IP-NIOS Altera, IP-NIOS Datasheet - Page 164
IP-NIOS
Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Specifications of IP-NIOS
Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
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Referenced Documents
Document Revision History
Table 6–7. Document Revision History
Nios II Processor Reference Handbook
December 2010
July 2010
November 2009
March 2009
November 2008
May 2008
October 2007
May 2007
March 2007
November 2006
May 2006
October 2005
May 2005
September 2004
May 2004
Date
10.1.0
10.0.0
Version
9.1.0
9.0.0
8.1.0
8.0.0
7.2.0
7.1.0
7.0.0
6.1.0
5.1.0
6.0.0
5.0.0
This chapter references no other documents.
Table 6–7
1.1
1.0
Maintenance release.
Maintenance release.
■
■
Maintenance release.
Maintenance release.
■
■
■
■
■
■
■
■
■
Updated tables to reflect no changes to cores.
Updated tables to reflect no changes to cores.
Updates for Nios II cores version 6.0.
Updates for Nios II cores version 5.1.
Updates for Nios II cores version 5.0.
Updates for Nios II cores version 1.1.
Initial release.
Added external interrupt controller interface information.
Added shadow register set information.
Added MMU information.
Added MPU information.
Added advanced exception checking information.
Added initda instruction information.
Added jmpi instruction information.
Added exception handling information.
Updated tables to reflect no changes to cores.
Added table of contents to Introduction section.
Added Referenced Documents section.
shows the revision history for this document.
Changes
Chapter 6: Nios II Processor Revision History
December 2010 Altera Corporation
Referenced Documents
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