IP-NIOS Altera, IP-NIOS Datasheet - Page 261
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IP-NIOS
Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Specifications of IP-NIOS
Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
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Chapter 8: Instruction Set Reference
Instruction Set Reference
nextpc
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Usage:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
0
28
27
26
25
24
0
rC ← PC + 4
nextpc rC
nextpc r6
Stores the address of the next instruction to register rC.
A relocatable code fragment can use nextpc to calculate the address of its data segment.
nextpc is the only way to access the PC directly.
None
R
C = Register index of operand rC
23
22
21
20
19
C
18
17
16
15
14
0x1c
13
get address of following instruction
12
11
10
9
0
8
Nios II Processor Reference Handbook
7
6
5
4
0x3a
3
2
1
8–75
0
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