MC68040RC33V Freescale Semiconductor, MC68040RC33V Datasheet - Page 298

• Manufacturer Part Number: MC68040RC33V
• Description: IC MICROPROCESSOR 32BIT PGA-182
• Manufacturer: Freescale Semiconductor

Specifications of MC68040RC33V

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 182
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Instructions using the brief and full extension word format addressing modes cause the
<ea> calculate and execute stages to operate in an interlocked manner. When these
instructions wait to begin execution in the execution stage, there is a similar increase in
the <ea> calculate time. Figure 10-3 illustrates this effect for an ADD instruction using a
brief format extension word. The ADD instruction stalls for two clocks waiting to enter the
execution stage. Since this time exceeds by one clock the ADD lead time, the ADD
instruction remains in the <ea> calculate stage for one additional clock. If the ADD
instruction was in the execution stage for two clocks, the ABCD instruction would not have
stalled in the <ea> calculate stage.
MOTOROLA
<ea> CALCULATE
NOTE: *Possible stalls in this stage.
WRITE-BACK
<ea> FETCH
EXECUTE
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LABEL
For More Information On This Product,
P1
N1
N2
C1
P1
A
B
Figure 10-3. Interlocked Stages
C2
P1
A
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M68040 USER’S MANUAL
TRAPF
ABCD
ADD.L
TRAPF
TRAPF
INSTRUCTION
C3
P1
B
A
D0,D1
4(A0,D3),D2
C4
B
B
A
C5
B
B
A
CALCULATE
C6
B*
B
A
<ea>
1
3
5
1
1
C7
B
B
B
C8
EXECUTE
B
B
B
1 L + 4
1
3
1
1
C9
N1
B
B
C10
N2
N1
B
C11
N2
N1
C12
N2
10-7