MC68030RC33C Freescale Semiconductor, MC68030RC33C Datasheet - Page 7

• Manufacturer Part Number: MC68030RC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

4 . 3
MOTOROLA
Paragraph
Number
3.5.4
4.1
4.1.1
4.1.2
4.1,3
4.2
4:3,1
4.3,2
3.3.2
3.4
3.5
3.5.1
3.5.2
3.5,3
5,1
5.2
5.3
5.4
5.5
5.6
5,6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
5.62
5.6,8
5.6.9
5.7
5.7,1
Address Space Types .............................................................. 4-5
Transfer Size Signals (SIZ0, SIZ1) ............................................. 5-4
Exception Processing .............................................................. 4-6
Signal Index ........................................................................... 5-2
Address Bus (A0-A31) ............................................................. 5-4
Cache Control Signals ............................................................. 5-7
Instruction Set S u m m a r y ......................................................... 3-18
Instruction Examples ............................................................... 3-25
Using the CAS and CAS2 Instructions ....................................... 3-25
Nested Subroutine Calls .......................................................... 3-30
Bit Field Operations ................................................................ 3-31
Pipeline Synchronization with the NOP Instruction ..................... 3-32
Privilege Levels ...................................................................... 4-2
Function Code Signals (FC0-FC2) ............................................. 5-4
Data Bus (D0-D31) .................................................................. 5-4
Bus Control Signals ...............................................................
Address Strobe (AS) ........................................................
Conditional Tests .............................................................. 3-17
Supervisor Privilege Level ................................................. 4-2
Changing Privilege Level ................................................... 4-4
Exception Stack Frame ...................................................... 4-7
Operand Cycle Start (OCS) ................................................
Synchronous Termination (STERM) .................................... 5-6
Cache Inhibit Input (CIIN) ................................................... 5-7
User Privilege L e v e l . ......................................................... 4-3
Exception Vectors ............................................................. 4-6
External Cycle Start (ECS) .................................................
Read/Write (R/W) .............................................................
Read-Modify-Write Cycle (RMC) ........................................
Data Strobe (DS) ..............................................................
Data Buffer Enable (DBEN) .......................... ......................
Data Transfer and Size Acknowledge (DSACK0, DSACK1) ..... 5-6
TABLE OF CONTENTS (Continued)
MC68030 USER'S MANUAL
Signal Description
Processing States
Section 4
Section 5
Title
Number
Page
5-6
5-5
5-5
5-5
5-5
5-5
5-5
5-6
v