IDT79RC32H434-400BCG IDT, Integrated Device Technology Inc, IDT79RC32H434-400BCG Datasheet - Page 22

• Manufacturer Part Number: IDT79RC32H434-400BCG
• Description: IC MPU 32BIT CORE 400MHZ 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32H434-400BCG

• Processor Type: MIPS32 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 79RC32H434-400BCG

MDATA[7:0]
EXTCLK
BDIRN
BOEN
WAITACKN
CSN[3:0]
RWN
OEN
WEN
1.
2.
3.
4.
IDT RC32434
Signal
The RC32434 provides bus turnaround cycles to prevent bus contention when going from read to write, write to read, and during external bus ownership. For example, there are no
The values for this symbol were determined by calculation, not by testing.
The frequency of EXTCLK is programmable. See the External Clock Divider (MDATA[5:4]) description in Table 3 of this data sheet.
WAITACKN must meet the setup and hold times if it is synchronous or the minimum pulse width if it is asynchronous.
cycles where an external device and the RC32434 are both driving. See Chapter 6, Device Controller, in the RC32434 User Reference Manual.
3
4
Symbol
Tpw_8h
Tdz_8c
Tzd_8c
Tper_8d
Tdz_8e
Tzd_8e
Tdz_8k
Tzd_8k
Thld_8c
Thld_8h
Tdz_8f
Tzd_8f
Tdz_8i
Tzd_8i
Tdz_8j
Tzd_8j
Tdz_8l
Tzd_8l
Tsu_8c
Tdo_8c
Tdo_8e
Tsu_8h
Tdo_8k
Tdo_8f
Tdo_8i
Tdo_8j
Tdo_8l
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
EXTCLK rising
EXTCLK rising
EXTCLK rising
EXTCLK rising
EXTCLK rising
EXTCLK rising
EXTCLK rising
EXTCLK rising
Reference
Edge
none
none
Table 8 Memory and Peripheral Bus AC Timing Characteristics (Part 2 of 2)
2(EXTCLK)
Min
6.0
0.4
0.4
7.5
0.4
0.4
6.5
0.4
0.4
0.4
0.4
266MHz
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
Max
4.5
0.5
3.3
3.8
3.8
4.0
3.8
4.0
3.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2(EXTCLK)
6.66
Min
6.0
0.4
0.4
0.4
0.4
6.5
0.4
0.4
0.4
0.4
—
—
—
—
—
—
—
—
—
—
—
—
300MHz
0
0
0
22 of 53
Max
4.5
0.5
3.3
3.8
3.8
4.0
3.8
4.0
3.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2(EXTCLK)
6.66
Min
6.0
0.4
0.4
0.4
0.4
6.5
0.4
0.4
0.4
0.4
350MHz
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
Max
4.5
0.5
3.3
3.8
3.8
4.0
3.8
4.0
3.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2(EXTCLK)
6.66
Min
6.0
0.4
0.4
0.4
0.4
6.5
0.4
0.4
0.4
0.4
—
—
—
—
—
—
—
—
—
—
—
—
400MHz
0
0
0
Max
4.5
0.5
3.3
3.8
3.8
4.0
3.8
4.0
3.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Condi-
tions
January 19, 2006
See Figures 8
and 9 (cont.).
Reference
Diagram
Timing