GC80503CSM66166SL388 Intel, GC80503CSM66166SL388 Datasheet - Page 10

IC MPU 1.9V PENTI 166MHZ 352BGA

GC80503CSM66166SL388

Manufacturer Part Number
GC80503CSM66166SL388
Description
IC MPU 1.9V PENTI 166MHZ 352BGA
Manufacturer
Intel
Datasheet

Specifications of GC80503CSM66166SL388

Rohs Status
RoHS non-compliant
Processor Type
Pentium I w/MMX
Features
66MHz Bus
Speed
166MHz
Voltage
1.9V
Mounting Type
Surface Mount
Package / Case
352-BGA
Other names
821225
Low-Power Embedded Pentium
10
As more and more functions are integrated on-chip, the complexity of board level testing is
increased. To address this, the Pentium processors have increased test and debug capability. The
Pentium processors implement IEEE Boundary Scan (Standard 1149.1). In addition, the Pentium
processors have specified four breakpoint pins that correspond to each of the debug registers and
externally indicate a breakpoint match. Execution tracing provides external indications when an
instruction has completed execution in either of the two internal pipelines, or when a branch has
been taken.
System Management Mode (SMM) has been implemented along with some extensions to the
SMM architecture. Enhancements to virtual 8086 mode have been made to increase performance
by reducing the number of times it is necessary to trap to a virtual 8086 monitor.
Figure 1 shows a block diagram of the Pentium processor with MMX technology.
The block diagram shows the two instruction pipelines, the “u” pipe and “v” pipe. The u-pipe can
execute all integer and floating-point instructions. The v-pipe can execute simple integer
instructions and the FXCH floating-point instructions.
The separate code and data caches are shown. The data cache has two ports, one for each of the two
pipes (the tags are triple ported to allow simultaneous inquire cycles). The data cache has a
dedicated Translation Lookaside Buffer (TLB) to translate linear addresses to the physical
addresses used by the data cache.
®
Processor with MMX™ Technology
Datasheet

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