CY8CTMG201-48LTXI Cypress Semiconductor Corp, CY8CTMG201-48LTXI Datasheet - Page 87

• Manufacturer Part Number: CY8CTMG201-48LTXI
• Description: IC MCU 16K FLASH PSOC 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTMG201-48LTXI

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (16 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2972

Figure 11-5. Relaxation Oscillator #2 Block Diagram
11.1.1.3
The successive approximation method provides a fast algo-
rithm for capacitance measurement for applications such as
detecting button presses. After a baseline is established, a
set of capacitive sensors are very quickly scanned. High
sensitivity can be achieved to enable scanning through a
large dielectric.
method. The successive approximation method is used for
proximity detection, fast button detection, and high resolu-
tion capacitance change measurement. The TrueTouch
Successive
PSoC Designer™ uses this method.
In this method, an internal capacitor is connected to the ana-
log global bus. This bus contains ripple at the clock fre-
quency, which is filtered with a low pass filter leading into the
comparator. In addition, the IDAC current is set to the
desired value as explained later in this section.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
RO Clock
IMO
Comparator
IDAC
Clock Select
TrueTouch
Approximation
Successive Approximation
Figure 11-6
Mux
Mux
CSCLK
Refs
shows the hardware used in this
Pin Enables
(CSA)
TrueTouch Logic
16-Bit Counter
6-Bit Counter
User
CS1
CS2
CSN
Module
in
Figure 11-6. Successive Approximation Block Diagram
The reference bus is connected to the analog global line to
initialize it to the Vr voltage (see
reference buffer is disconnected and not used. The sense
capacitance
Figure
Figure
the global net alternately charges and discharges a small
amount.
Figure 11-7. Initialization Phase for Successive
Approximation
Vr
Comparator
Vr
Comparator
M8C Read
IDAC
M8C Read
Reference
IDAC
11-8) and connected to the analog global (see
11-9). With the IDAC’s current driving onto this net,
Buffer
Reference
Buffer
pin
Mux
Mux
Mux
Mux
Closed
REF_EN
is
LP Filter
IMO
Filter
Vr
Vr
LP
now
alternately
Clock Select
Figure
TrueTouch
Closed
CSCLK
Closed
11-7). After that, the
TrueTouch Module
grounded
C
INTERNAL
C
CSCLK
INTERNAL
CS1
CS2
CSN
CS1
CS2
CSN
(see
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87