CY8CTMG201-48LTXI Cypress Semiconductor Corp, CY8CTMG201-48LTXI Datasheet - Page 183

• Manufacturer Part Number: CY8CTMG201-48LTXI
• Description: IC MCU 16K FLASH PSOC 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTMG201-48LTXI

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (16 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2972

The Registers section discusses the registers of the PSoC device. It lists all the registers in mapping tables, in address order.
For easy reference, each register is linked to the page of a detailed description located in the next chapter. This section
encompasses the following chapter:
■
Register General Conventions
The register conventions specific to this section and the
Register Reference chapter are listed in the following table:
Register Conventions
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Empty, grayed-out
table cell
‘x’ before the comma
in an address
‘x’ in a register name
R
W
O
L
C
#
Section E: Registers
Register Reference chapter on page
Convention
Illustrates a reserved bit or group of bits.
Indicates the register exists in register bank 1 and
register bank 2.
Indicates that there are multiple instances/address
ranges of the same register.
Read register or bit(s).
Write register or bit(s).
Only a read/write register or bit(s).
Logical register or bit(s).
Clearable register or bit(s).
Access is bit specific.
Description
187.
Register Mapping Tables
The PSoC device has a total register address space of 512
bytes. The register space is also referred to as I/O space
and is broken into two parts: Bank 0 (user space) and Bank
1 (configuration space). The XIO bit in the Flag register
(CPU_F) determines which bank the user is currently in.
When the XIO bit is set, the user is said to be in the
“extended” address space or the “configuration” registers.
Refer to the individual PSoC device data sheets for device-
specific register mapping information.
183
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