CY8CTMG201-48LTXI Cypress Semiconductor Corp, CY8CTMG201-48LTXI Datasheet - Page 283

• Manufacturer Part Number: CY8CTMG201-48LTXI
• Description: IC MCU 16K FLASH PSOC 48-QFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTMG201-48LTXI

• Applications: Touchscreen Controller
• Core Processor: M8C
• Program Memory Type: FLASH (16 kB)
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 38
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Processor Series: CY8CTxx2xx
• Core: M8C
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2972

21.4.24 SLP_CFG
This register sets up the sleep duty cycle.
In the table above, note that reserved bits are grayed table cells and are not described in the bit description section below.
Reserved bits must always be written with a value of ‘0’. For additional information, refer to the
page 77
Bit
7:6
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
SLP_CFG : 1,EBh
Access : POR
Bit Name
in the Sleep and Watchdog chapter.
PSSDC[1:0]
Name
Sleep Configuration Register
7
PSSDC[1:0]
RW : 0
6
Description
Sleep Duty Cycle. Controls the ratios (in numbers of 32.768 kHz clock periods) of “on” time versus
“off” time for PORLVD, bandgap reference, and pspump.
00b
01b
10b
11b
1 / 256 (8 ms).
1 / 1024 (31.2 ms).
1 / 64 (2 ms).
1 / 16 (500 µs).
5
4
3
2
1,EBh
Register Definitions on
1
SLP_CFG
1,EBh
0
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