CY7C66113C-LFXC Cypress Semiconductor Corp, CY7C66113C-LFXC Datasheet - Page 36

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CY7C66113C-LFXC

Manufacturer Part Number
CY7C66113C-LFXC
Description
IC MCU 8K USB HUB 4 PORT 56VQFN
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C66113C-LFXC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB, HAPI
Number Of I /o
31
Voltage - Supply
4 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
Controller Family/series
(8051) USB
Ram Memory Size
256Byte
No. Of Timers
1
Digital Ic Case Style
QFN
Operating Temperature Range
0°C To +70°C
No. Of Pins
56
Core Size
8 Bit
Embedded Interface Type
HAPI, I2C, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C66113C-LFXC
Manufacturer:
CYPRESS
Quantity:
250
Part Number:
CY7C66113C-LFXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Hub Ports Resume
Bit [0..3]: Resume x (where x = 1..4)
When set to 1 Port x requesting to be resumed (set by hardware);
default state is 0;
Bit [7..4]: Reserved.
The Reserved bits [7..4] should always read as ‘0’.
Resume from a selectively suspended port, with the hub not in
suspend, typically involves these actions:
Document Number: 38-08024 Rev. *D
1. Hardware detects the Resume, drives a K to the port, and
2. Firmware responds to hub interrupt, and reads register 0x4E
3. Firmware begins driving K on the port for 10 ms or more
4. Firmware clears the Selective Suspend bit for the port (0x4D),
5. Firmware drives a timed SE0 on the port for two low speed bit
Bit #
Bit Name
Read/Write
Reset
generates the hub interrupt. The corresponding bit in the
Resume Status Register (0x4E) reads ‘1’ in this case.
to determine the source of the Resume.
through register 0x4B.
which clears the Resume bit (0x4E). This ends the hardware
driven Resume, but the firmware driven Resume continues.
To prevent traffic being fed by the hub repeater to the port
during or just after the Resume, firmware should disable this
port.
times as appropriate.
Note Firmware must disable interrupts during this SE0 so the
SE0 pulse is not inadvertently lengthened and appears as a
bus reset to the downstream device.
7
Reserved
-
0
6
Reserved
-
0
Figure 41. Hub Ports Resume Status Register
5
Reserved
-
0
4
Reserved
-
0
Resume when the hub is suspended typically involves these
actions:
Firmware chooses to clear the Device Remote Wakeup bit (if set)
to implement firmware timed states for port changes. All allowed
port changes wake the part. Then, the part uses internal timing
to determine whether to take action or return to suspend. If
Device Remote Wakeup is set, automatic hardware assertions
take place on Resume events.
6. Firmware drives a J on the port for one low speed bit time,
7. Firmware re-enables the port.
1. Hardware detects the Resume, drives a K on the upstream
2. The part comes out of suspend and the clocks start.
3. When the clocks are stable, firmware execution resumes. An
4. The Resume ends when the host stops sending K from
then it idles the port.
(which is then reflected to all downstream enabled ports), and
generates the hub interrupt.
internal counter ensures that this takes at least 1 ms.
Firmware should check for Resume from any selectively
suspended ports. If found, the Selective Suspend bit for the
port should be cleared; no other action is necessary.
upstream. Firmware should check for changes to the Enable
and Connect Registers. If a port has become disabled but is
still connected, an SE0 is detected on the port. The port is
treated as being reset, and is reported to the host as newly
connected.
3
Resume 4
R
0
CY7C66013C, CY7C66113C
2
Resume 3
R
0
1
Resume 2
R
0
ADDRESS 0x4E
Page 36 of 59
0
Resume 1
R
0
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