EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 814

• Manufacturer Part Number: EP1S10F780I6N
• Description: IC STRATIX FPGA 10K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F780I6N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 426
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Using Enhanced Configuration Devices
12–36
Stratix Device Handbook, Volume 2
2.
3.
4.
5.
6.
7.
8.
9.
10. Click OK to generate initial programming and memory map files.
Select Programmer Object File (*.pof) from the drop-down list
titled Programming file type.
Select the enhanced configuration device used (EPC4, EPC8,
EPC16), and the mode used (1-bit Passive Serial or Fast Passive
Parallel). Only during the initial programming file generation can
you specify the Options, Configuration device, or Mode settings.
While generating the partial programming file, all of these settings
are grayed out and inaccessible.
In the Input files to convert box, highlight SOF Data at Page 0 and
click Add File. Select input SOF file(s) for this configuration page
and insert them.
Repeat Step 4 for all the application configuration pages (pages 1
and 2 in this example).
For enabling block addressing, select the SOF Data entry for Page 1,
and click Properties. This opens the SOF Data Properties dialog
box (see
Pick Block from the Address Mode drop down selection, and enter
32-bit Hexadecimal byte address for block Starting Address and
Ending Address. Note that for partial programming support, the
block start and end addresses should be aligned to a flash sector
boundary. This prevents two configuration pages from overlapping
within the same flash boundary. See the flash memory datasheet for
data sector boundary information. Click OK to save SOF data
properties.
Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of each configuration page
and user data blocks.
Save the CPF setup (optionally), by selecting Save Conversion
Setup… and specifying a name for the COF output file.
Figure
12–21).
Altera Corporation
September 2004