EP3C16F256C7N Altera, EP3C16F256C7N Datasheet - Page 65

• Manufacturer Part Number: EP3C16F256C7N
• Description: IC CYCLONE III FPGA 16K 256FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C16F256C7N

• Number Of Logic Elements/cells: 15408
• Number Of Labs/clbs: 963
• Total Ram Bits: 516096
• Number Of I /o: 168
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 15408
• # I/os (max): 168
• Frequency (max): 437.5MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 15408
• Ram Bits: 516096
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2463

Design Checklist
© November 2008 Altera Corporation
“Design Debugging” on page 55
“Testing” on page 56
“Other Considerations” on page 56
91
92
93
94
95
96
97
98
Done
Done
Done
N/A
N/A
N/A
Use the PowerPlay Power Analyzer to perform power estimation on your design.
Perform timing or functional simulation with the Quartus II Simulator or other third-party
simulation tools to verify that your design is working correctly.
Use incremental compilation to reduce compilation time during debugging.
Perform boundary-scan test to check the pin connections on your board.
Use the BSDLCustomizer tool to regenerate the BSDL file based on your design.
Be cautious of ESD when handling the device.
Operate the device within the recommended operating conditions.
Use the Cyclone III FPGA Starter Kit to test out various features of the Cyclone III device.
Page 65