EP3C5F256I7N Altera, EP3C5F256I7N Datasheet - Page 57
![IC CYCLONE III FPGA 5K 256 FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP3C5F256I7N
Manufacturer Part Number
EP3C5F256I7N
Description
IC CYCLONE III FPGA 5K 256 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C5F256I7N.pdf
(274 pages)
Specifications of EP3C5F256I7N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
182
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2558
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5F256I7N
Manufacturer:
ALTERA32
Quantity:
1 608
Part Number:
EP3C5F256I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Embedded Multiplier Block Overview
© December 2009
CIII51005-2.2
Altera Corporation
The Cyclone
combination of on-chip resources and external interfaces that help to increase
performance, reduce system cost, and lower the power consumption of digital signal
processing (DSP) systems. The Cyclone III device family, either alone or as DSP
device co-processors, are used to improve price-to-performance ratios of DSP
systems. Particular focus is placed on optimizing Cyclone III and Cyclone III LS
devices for applications that benefit from an abundance of parallel processing
resources, which include video and image processing, intermediate frequency (IF)
modems used in wireless communications systems, and multi-channel
communications and video systems.
This chapter contains the following sections:
■
■
■
Figure 4–1
array blocks (LABs). The embedded multiplier is configured as either one 18 × 18
multiplier or two 9 × 9 multipliers. For multiplications greater than 18 × 18, the
Quartus
are no restrictions on the data width of the multiplier, but the greater the data width,
the slower the multiplication process.
Figure 4–1. Embedded Multipliers Arranged in Columns with Adjacent LABs
“Embedded Multiplier Block Overview” on page 4–1
“Architecture” on page 4–3
“Operational Modes” on page 4–5
®
II software cascades multiple embedded multiplier blocks together. There
shows one of the embedded multiplier columns with the surrounding logic
®
III device family (Cyclone III and Cyclone III LS devices) includes a
1 LAB
Row
4. Embedded Multipliers in the
Embedded
Multiplier
Embedded
Multiplier
Column
Cyclone III Device Family
Cyclone III Device Handbook, Volume 1