EP3C5F256I7N Altera, EP3C5F256I7N Datasheet - Page 23
![IC CYCLONE III FPGA 5K 256 FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP3C5F256I7N
Manufacturer Part Number
EP3C5F256I7N
Description
IC CYCLONE III FPGA 5K 256 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C5F256I7N.pdf
(274 pages)
Specifications of EP3C5F256I7N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
182
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2558
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5F256I7N
Manufacturer:
ALTERA32
Quantity:
1 608
Part Number:
EP3C5F256I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Cyclone III Device Family Overview
Cyclone III Device Family Architecture
Support for Industry-Standard Embedded Processors
Hot Socketing and Power-On-Reset
SEU Mitigation
© December 2009
f
f
1
Altera Corporation
To quickly and easily create system-level designs using Cyclone III device family, you
can select among the ×32-bit soft processor cores: Freescale
Cortex M1, or Altera Nios
the system-on-a-programmable-chip (SOPC) Builder tool. SOPC Builder is an Altera
Quartus II design tool that facilitates system-integration of IP blocks in an FPGA
design. The SOPC Builder automatically generates interconnect logic and creates a
testbench to verify functionality, saving valuable design time.
Cyclone III device family expands the peripheral set, memory, I/O, or performance of
legacy embedded processors. Single or multiple Nios II embedded processors are
designed into Cyclone III device family to provide additional co-processing power, or
even replace legacy embedded processors in your system. Using the Cyclone III
device family and Nios II together provide low-cost, high-performance embedded
processing solutions, which in turn allow you to extend the life cycle of your product
and improve time-to-market over standard product solutions.
Separate licensing of the Freescale and ARM embedded processors are required.
Cyclone III device family features hot socketing (also known as hot plug-in or hot
swap) and power sequencing support without the use of external devices. You can
insert or remove a board populated with one or more Cyclone III device family
during a system operation without causing undesirable effects to the running system
bus or the board that was inserted into the system.
The hot socketing feature allows you to use FPGAs on PCBs that also contain a
mixture of 3.3-V, 2.5-V, 1.8-V, 1.5-V, and 1.2-V devices. The Cyclone III device family
hot socketing feature eliminates power-up sequence requirements for other devices
on the board for proper FPGA operation.
For more information about hot socketing and power-on-reset, refer to the
Hot-Socketing and Power-on-Reset in Cyclone III Devices
Cyclone III LS devices offer built-in error detection circuitry to detect data corruption
due to soft errors in the CRAM cells. This feature allows CRAM contents to be read
and verified to match a configuration-computed CRC value. The Quartus II software
activates the built-in 32-bit CRC checker, which is part of the Cyclone III LS device.
For more information about SEU mitigation, refer to the
Devices
chapter.
®
II, along with a library of 50 other IP blocks when using
chapter.
SEU Mitigation in Cyclone III
Cyclone III Device Handbook, Volume 1
®
V1 Coldfire, ARM
®
1–9