XC5VLX110-1FFG676C Xilinx Inc, XC5VLX110-1FFG676C Datasheet - Page 244

• Manufacturer Part Number: XC5VLX110-1FFG676C
• Description: IC FPGA VIRTEX-5 110K 676FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX110-1FFG676C

• Total Ram Bits: 4718592
• Number Of Logic Elements/cells: 110592
• Number Of Labs/clbs: 8640
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 676-BBGA, FCBGA
• No. Of Logic Blocks: 17280
• No. Of Gates: 110000
• Family Type: Virtex-5 LX
• No. Of Speed Grades: 1
• No. Of I/o's: 440
• Clock Management: PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1557

Chapter 6: SelectIO Resources
244
LVDCI_DV2
A controlled impedance driver with half impedance (source termination) can also provide
drivers with one half of the impedance of the reference resistors. This allows reference
resistors to be twice as large, thus reducing static power consumption through VRN/VRP.
The I/O standards supporting a controlled impedance driver with half impedance are:
LVDCI_DV2_15, LVDCI_DV2_18, and LVDCI_DV2_25.
illustrate a controlled driver with half impedance unidirectional and bidirectional
termination.
To match the drive impedance to Z
reference resistor R must be twice Z
X-Ref Target - Figure 6-33
X-Ref Target - Figure 6-34
There are no drive strength settings for LVDCI drivers. When the driver impedance is one-
half of the VRN/VRP reference resistors, it is indicated by the addition of DV2 to the
attribute name.
Table 6-9
R 0 = ½R VRN = ½R VRP = Z 0
lists the LVCMOS, LVDCI, and LVDCI_DV2 voltage specifications.
R 0 = ½R VRN = ½R VRP = Z 0
Figure 6-33: Controlled Impedance Driver with Half Impedance
Figure 6-34: Controlled Impedance Driver with Half Impedance
LVDCI_DV2
LVDCI_DV2
www.xilinx.com
IOB
IOB
Unidirectional Termination
Bidirectional Termination
0
0
when using a driver with half impedance, the
.
Z 0
Z 0
IOB
IOB
Figure 6-33
R 0 = ½R VRN = ½R VRP = Z 0
LVDCI_DV2
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
and
ug190_6_30_022806
LVDCI_DV2
Figure 6-34
ug190_6_31_022806