XC3S700AN-4FGG484C Xilinx Inc, XC3S700AN-4FGG484C Datasheet - Page 84

• Manufacturer Part Number: XC3S700AN-4FGG484C
• Description: IC SPARTAN-3AN FPGA 700K 484FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S700AN-4FGG484C

• Total Ram Bits: 368640
• Number Of Logic Elements/cells: 13248
• Number Of Labs/clbs: 1472
• Number Of I /o: 372
• Number Of Gates: 700000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-BBGA
• No. Of Logic Blocks: 13248
• No. Of Gates: 700000
• No. Of Macrocells: 13248
• Family Type: Spartan-3AN
• No. Of Speed Grades: 4
• No. Of I/o's: 372
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1528 - KIT STARTER SPARTAN-3 AN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1556

Table 70: Spartan-3AN FTG256 Pinout (XC3S50AN, XC3S200AN, XC3S400AN) (Cont’d)
DS557 (v4.1) April 1, 2011
Product Specification
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
N.C.
N.C.
N.C.
N.C.
IO_L20N_3
IO_L20P_3
IO_L22N_3
IO_L22P_3
IO_L23N_3
IO_L23P_3
IO_L24N_3
IO_L24P_3
IP_L04N_3/VREF_3
IP_L04P_3
N.C.
N.C.
IP_L13N_3
IP_L13P_3
IP_L21N_3
IP_L21P_3
IP_L25N_3/VREF_3
IP_L25P_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S50AN Pin Name
www.xilinx.com
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IO_L20N_3
IO_L20P_3
IO_L22N_3
IO_L22P_3
IO_L23N_3
IO_L23P_3
IO_L24N_3
IO_L24P_3
IP_L04N_3/VREF_3
IP_L04P_3
IP_L06N_3/VREF_3
IP_L06P_3
IP_L13N_3
IP_L13P_3
IP_L21N_3
IP_L21P_3
IP_L25N_3/VREF_3
IP_L25P_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S200AN/XC3S400AN Pin Name
Spartan-3AN FPGA Family: Pinout Descriptions
FTG256 Ball
C14
G10
G15
A16
B11
E12
M3
N1
M1
N2
R1
M4
N3
G5
G6
D2
H2
M2
C3
G8
H9
K4
P1
P2
F4
E4
H7
K6
K5
A1
B7
E5
F2
F6
L3
L4
J7
L6
L5
J5
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VREF
VREF
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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