XC3S700AN-4FGG484C Xilinx Inc, XC3S700AN-4FGG484C Datasheet - Page 111
![IC SPARTAN-3AN FPGA 700K 484FBGA](/photos/6/72/67299/pk081-484_sml.jpg)
XC3S700AN-4FGG484C
Manufacturer Part Number
XC3S700AN-4FGG484C
Description
IC SPARTAN-3AN FPGA 700K 484FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S700AN-4FGG484C
Total Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
No. Of Logic Blocks
13248
No. Of Gates
700000
No. Of Macrocells
13248
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
372
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1528 - KIT STARTER SPARTAN-3 AN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1556
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S700AN-4FGG484C
Manufacturer:
XilinxInc
Quantity:
3 000
Company:
Part Number:
XC3S700AN-4FGG484C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 82: Spartan-3AN FGG676 Pinout (Cont’d)
DS557 (v4.1) April 1, 2011
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IO_L33N_0
IO_L33P_0
IO_L34N_0
IO_L34P_0
IO_L35N_0
IO_L35P_0
IO_L36N_0
IO_L36P_0
IO_L37N_0
IO_L37P_0
IO_L38N_0
IO_L38P_0
IO_L39N_0
IO_L39P_0
IO_L40N_0
IO_L40P_0
IO_L41N_0
IO_L41P_0
IO_L42N_0
IO_L42P_0
IO_L43N_0
IO_L43P_0
IO_L44N_0
IO_L44P_0
IO_L45N_0
IO_L45P_0
IO_L46N_0
IO_L46P_0
IO_L47N_0
IO_L47P_0
IO_L48N_0
IO_L48P_0
IO_L51N_0
IO_L51P_0
IO_L52N_0/PUDC_B
IO_L52P_0/VREF_0
IP_0
IP_0
IP_0
IP_0
Pin Name
FGG676
Ball
D10
C10
H12
G12
H10
G10
B10
A10
E10
K12
K11
A13
A17
J12
J11
C8
C5
G9
G8
B9
A9
D9
B8
A8
D8
C6
B6
C7
B7
D6
B4
A4
H9
E7
F7
B3
A3
F8
A5
A7
INPUT
INPUT
INPUT
INPUT
DUAL
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 82: Spartan-3AN FGG676 Pinout (Cont’d)
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
Spartan-3AN FPGA Family: Pinout Descriptions
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0
IP_0/VREF_0
IP_0/VREF_0
IP_0/VREF_0
IP_0/VREF_0
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
VCCO_0
IO_L01N_1/LDC2
IO_L01P_1/HDC
IO_L02N_1/LDC0
Pin Name
FGG676
AD25
Ball
D12
D15
D19
G14
G16
H13
H18
D14
G11
G18
H11
H16
A23
E11
E18
E20
F10
A24
B24
F18
B11
B16
B22
E13
E19
Y21
Y20
J10
J13
J15
J17
C4
D7
D5
E9
E6
F9
B5
E8
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
VREF
VREF
VREF
DUAL
DUAL
DUAL
Type
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
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