EP2C35F672C8 Altera, EP2C35F672C8 Datasheet - Page 9

• Manufacturer Part Number: EP2C35F672C8
• Description: IC CYCLONE II FPGA 33K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C35F672C8

• Number Of Logic Elements/cells: 33216
• Number Of Labs/clbs: 2076
• Total Ram Bits: 483840
• Number Of I /o: 475
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 33216
• # I/os (max): 475
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 33216
• Ram Bits: 483840
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• For Use With: NANO-CYCLONE - KIT NANOBOARD AND CYCLONEII DC807-1002 - DAUGHTER CARD ALTERA CYCLONE IIP0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1089; EP2C35F672C8ES

Altera Corporation
February 2008
Notes to
(1)
(2)
(3)
(4)
(5)
EP2C5 to
EP2C8
EP2C8 to
EP2C15
EP2C15 to
EP2C20
EP2C20 to
EP2C35
EP2C35 to
EP2C50
EP2C50 to
EP2C70
Migration Path
Table 1–3. Total Number of Non-Migratable I/O Pins for Cyclone II Vertical Migration Paths
Vertical
Vertical migration between the EP2C5F256 to the EP2C15AF256 and the EP2C5F256 to the EP2C20F256 devices is
not supported.
When migrating from the EP2C20F484 device to the EP2C50F484 device, a total of 39 I/O pins are non-migratable.
When migrating from the EP2C35F672 device to the EP2C70F672 device, a total of 56 I/O pins are non-migratable.
In addition to the one non-migratable I/O pin, there are 34 DQ pins that are non-migratable.
The pinouts of 484 FBGA and 484 UBGA are the same.
Table
1–3:
144-Pin TQFP
—
—
—
—
4
Vertical migration means that you can migrate to devices whose
dedicated pins, configuration pins, and power pins are the same for a
given package across device densities.
1
To ensure that your board layout supports migratable densities within
one package offering, enable the applicable vertical migration path
within the Quartus II software (go to Assignments menu, then Device,
then click the Migration Devices button). After compilation, check the
information messages for a full list of I/O, DQ, LVDS, and other pins that
are not available because of the selected migration path.
Cyclone II device package offerings and shows the total number of
non-migratable I/O pins when migrating from one density device to a
larger density device.
208-Pin
PQFP
—
—
—
—
—
4
When moving from one density to a larger density, I/O pins are
often lost because of the greater number of power and ground
pins required to support the additional logic within the larger
device. For I/O pin migration across densities, you must cross
reference the available I/O pins using the device pin-outs for all
planned densities of a given package type to identify which I/O
pins are migratable.
FineLine BGA
256-Pin
1
(1)
30
—
—
—
0
(4)
FineLine BGA
484-Pin
Cyclone II Device Handbook, Volume 1
(2)
16
28
—
—
—
0
FineLine BGA
484-Pin Ultra
28
28
—
—
—
—
(5)
Table 1–3
FineLine BGA
Introduction
672-Pin
(3)
28
28
—
—
—
—
lists the
1–7