EP2C35F672C8 Altera, EP2C35F672C8 Datasheet - Page 123

• Manufacturer Part Number: EP2C35F672C8
• Description: IC CYCLONE II FPGA 33K 672-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C35F672C8

• Number Of Logic Elements/cells: 33216
• Number Of Labs/clbs: 2076
• Total Ram Bits: 483840
• Number Of I /o: 475
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 33216
• # I/os (max): 475
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 33216
• Ram Bits: 483840
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• For Use With: NANO-CYCLONE - KIT NANOBOARD AND CYCLONEII DC807-1002 - DAUGHTER CARD ALTERA CYCLONE IIP0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1089; EP2C35F672C8ES

Altera Corporation
February 2008
LVTTL
2.5V
1.8V
1.5V
LVCMOS
SSTL_2_CLASS_I
SSTL_2_CLASS_II
SSTL_18_CLASS_I
SSTL_18_CLASS_II
Table 5–40. Cyclone II I/O Input Delay for Column Pins (Part 1 of 3)
I/O Standard
I/O Delays
Refer to
t
t
t
t
D I P
O P
P C O U T
P I
Table 5–39. I/O Delay Parameters
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Parameter
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
P I
P C O U T
Tables 5–39
Delay from I/O datain to output pad
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
Automotive
Industrial/
581
367
624
410
725
511
790
576
581
367
533
319
533
319
577
363
577
363
through
Fast Corner
Commer
DC Characteristics and Timing Specifications
5–43
-cial
609
385
654
430
760
536
828
604
609
385
558
334
558
334
605
381
605
381
for I/O delays.
Cyclone II Device Handbook, Volume 1
Speed
Parameter
Grade
1222
1192
1372
1439
1222
1027
1027
760
730
910
977
760
990
528
990
528
565
565
–6
Speed
Grade
1228
1238
1428
1497
1052
1228
1015
1015
1035
1035
783
793
983
783
570
570
590
590
(1)
–7
Speed
Grade
1282
1283
1484
1056
1556
1128
1282
1040
1040
1045
1045
854
855
854
612
612
617
617
(2)
–7
Speed
Grade
1282
1283
1484
1056
1556
1128
1282
1040
1040
1045
1045
854
855
854
612
612
617
617
–8
Unit
5–33
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps