EP1K10TC100-3N Altera, EP1K10TC100-3N Datasheet - Page 48

IC ACEX 1K FPGA 10K 100-TQFP

EP1K10TC100-3N

Manufacturer Part Number
EP1K10TC100-3N
Description
IC ACEX 1K FPGA 10K 100-TQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10TC100-3N

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
66
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Family Name
ACEX™ 1K
Number Of Usable Gates
10000
Number Of Logic Blocks/elements
576
# I/os (max)
66
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
576
Ram Bits
12288
Device System Gates
56000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1828
EP1K10TC100-3N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1K10TC100-3N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1K10TC100-3N
Manufacturer:
ALTERA
0
Part Number:
EP1K10TC100-3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
ACEX 1K Programmable Logic Device Family Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10) The I
(11) This value is specified for normal device operation. The value may vary during power-up.
(12) This parameter applies to -1 speed grade commercial temperature devices and -2 speed grade industrial and
(13) Pin pull-up resistance values will be lower if the pin is driven higher than V
(14) Capacitance is sample-tested only.
48
C
C
C
Symbol
Table 21. ACEX 1K Device Capacitance
IN
INCLK
OUT
See the
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
Numbers in parentheses are for industrial- and extended-temperature-range devices.
Maximum V
All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before V
powered.
Typical values are for T
These values are specified under the ACEX 1K Recommended Operating Conditions shown in Table 19 on page 46.
The ACEX 1K input buffers are compatible with 2.5-V, 3.3-V (LVTTL and LVCMOS), and 5.0-V TTL and CMOS
signals. Additionally, the input buffers are 3.3-V PCI compliant when V
shown in
The I
as well as output pins.
extended temperature devices.
OL
OH
Input capacitance
Input capacitance on
dedicated clock pin
Output capacitance
Operating Requirements for Altera Devices Data
parameter refers to low-level TTL, PCI, or CMOS output current. This parameter applies to open-drain pins
parameter refers to high-level TTL, PCI, or CMOS output current.
Figure
CC
Parameter
rise time is 100 ms, and V
22.
A
= 25 C, V
CCINT
V
V
V
IN
IN
OUT
CC
= 2.5 V, and V
= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz
must rise monotonically.
Note (14)
= 0 V, f = 1.0 MHz
Sheet.
Conditions
CCIO
= 2.5 V or 3.3 V.
CCIO
CCIO
and V
by an external source.
CCINT
Min
CCINT
meet the relationship
Altera Corporation
and V
Max
10
12
10
CCIO
are
Unit
pF
pF
pF

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