DSPB56371AF150 Freescale Semiconductor, DSPB56371AF150 Datasheet - Page 26

IC DSP 24BIT 150MHZ 80-LQFP

DSPB56371AF150

Manufacturer Part Number
DSPB56371AF150
Description
IC DSP 24BIT 150MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56371AF150

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
150MHz
Non-volatile Memory
ROM (384 kB)
On-chip Ram
264kB
Voltage - I/o
3.30V
Voltage - Core
1.25V
Operating Temperature
-40°C ~ 115°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Product
DSPs
Data Bus Width
24 bit
Processor Series
DSP563xx
Core
56000
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
150 MIPs
Maximum Clock Frequency
150 MHz
Program Memory Size
192 KB
Data Ram Size
264 KB
Operating Supply Voltage
1.25 V, 3.3 V
Maximum Operating Temperature
+ 115 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPB56371AF150
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
DSPB56371AF150
Manufacturer:
FREESCALE
Quantity:
20 000
Signal/Connection Descriptions
26
Signal Name
SCKR_1
SDO5_1
SCKT_1
SDI0_1
PE0
PE3
PE6
Input, output, or
Input, output, or
Input, output, or
Input or output
Input or output
disconnected
disconnected
disconnected
Signal Type
Output
Input
Table 9. Enhanced Serial Audio Interface_1 Signals
State during
disconnected
disconnected
disconnected
Reset
GPIO
GPIO
GPIO
DSP56371 Data Sheet, Rev. 4.1
Receiver Serial Clock_1—SCKR_1 provides the receiver serial
bit clock for the ESAI_1. The SCKR_1 operates as a clock input
or output used by all the enabled receivers in the asynchronous
mode (SYN=0), or as serial flag 0 pin in the synchronous mode
(SYN=1).
When this pin is configured as serial flag pin, its direction is
determined by the RCKD bit in the RCCR_1 register. When
configured as the output flag OF0, this pin will reflect the value of
the OF0 bit in the SAICR_1 register, and the data in the OF0 bit
will show up at the pin synchronized to the frame sync in normal
mode or the slot in network mode. When configured as the input
flag IF0, the data value at the pin will be stored in the IF0 bit in the
SAISR_1 register, synchronized by the frame sync in normal
mode or the slot in network mode.
Port E0—When the ESAI_1 is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Transmitter Serial Clock_1—This signal provides the serial bit
rate clock for the ESAI_1. SCKT_1 is a clock input or output used
by all enabled transmitters and receivers in synchronous mode,
or by all enabled transmitters in asynchronous mode.
Port E3—When the ESAI_1 is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Serial Data Output 5_1—When programmed as a transmitter,
SDO5_1 is used to transmit data from the TX5 serial transmit shift
register.
Serial Data Input 0_1—When programmed as a receiver,
SDI0_1 is used to receive serial data into the RX0 serial receive
shift register.
Port E6—When the ESAI_1 is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Signal Description
Freescale Semiconductor

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