DSPB56371AF150 Freescale Semiconductor, DSPB56371AF150 Datasheet - Page 21

IC DSP 24BIT 150MHZ 80-LQFP

DSPB56371AF150

Manufacturer Part Number
DSPB56371AF150
Description
IC DSP 24BIT 150MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
Symphony™r
Type
Audio Processorr
Datasheet

Specifications of DSPB56371AF150

Interface
Host Interface, I²C, SAI, SPI
Clock Rate
150MHz
Non-volatile Memory
ROM (384 kB)
On-chip Ram
264kB
Voltage - I/o
3.30V
Voltage - Core
1.25V
Operating Temperature
-40°C ~ 115°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Product
DSPs
Data Bus Width
24 bit
Processor Series
DSP563xx
Core
56000
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
150 MIPs
Maximum Clock Frequency
150 MHz
Program Memory Size
192 KB
Data Ram Size
264 KB
Operating Supply Voltage
1.25 V, 3.3 V
Maximum Operating Temperature
+ 115 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DSPB56371AF150
Manufacturer:
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Quantity:
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Part Number:
DSPB56371AF150
Manufacturer:
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Quantity:
20 000
Freescale Semiconductor
Signal
Name
SCKR
SCKT
SDO5
SDI0
PC0
PC3
PC6
Input, output, or
Input, output, or
Input, output, or
Input or output
Input or output
disconnected
disconnected
disconnected
Signal Type
Output
Input
Table 8. Enhanced Serial Audio Interface Signals (continued)
State during
disconnected
disconnected
disconnected
Reset
GPIO
GPIO
GPIO
DSP56371 Data Sheet, Rev. 4.1
Receiver Serial Clock—SCKR provides the receiver serial bit
clock for the ESAI. The SCKR operates as a clock input or output
used by all the enabled receivers in the asynchronous mode
(SYN=0), or as serial flag 0 pin in the synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is
determined by the RCKD bit in the RCCR register. When
configured as the output flag OF0, this pin will reflect the value of
the OF0 bit in the SAICR register, and the data in the OF0 bit will
show up at the pin synchronized to the frame sync in normal mode
or the slot in network mode. When configured as the input flag IF0,
the data value at the pin will be stored in the IF0 bit in the SAISR
register, synchronized by the frame sync in normal mode or the slot
in network mode.
Port C0—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Transmitter Serial Clock—This signal provides the serial bit rate
clock for the ESAI. SCKT is a clock input or output used by all
enabled transmitters and receivers in synchronous mode, or by all
enabled transmitters in asynchronous mode.
Port C3—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Serial Data Output 5—When programmed as a transmitter, SDO5
is used to transmit data from the TX5 serial transmit shift register.
Serial Data Input 0—When programmed as a receiver, SDI0 is
used to receive serial data into the RX0 serial receive shift register.
Port C6—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally
disconnected.
The default state after reset is GPIO disconnected.
Internal Pull down resistor.
This input is 5 V tolerant.
Signal Description
Signal/Connection Descriptions
21

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