DSPB56371AF150 Freescale Semiconductor, DSPB56371AF150 Datasheet - Page 16

• Manufacturer Part Number: DSPB56371AF150
• Description: IC DSP 24BIT 150MHZ 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56371AF150

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (384 kB)
• On-chip Ram: 264kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 115°C
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 150 MIPs
• Maximum Clock Frequency: 150 MHz
• Program Memory Size: 192 KB
• Data Ram Size: 264 KB
• Operating Supply Voltage: 1.25 V, 3.3 V
• Maximum Operating Temperature: + 115 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signal/Connection Descriptions
3.7
The SHI has five I/O signals that can be configured to allow the SHI to operate in either SPI or I
16
Signal Name
MODC/IRQC
MODD/IRQD
MODB/IRQB
RESET
Serial Host Interface
Type
Input
Input
Input
Input
During
Reset
State
Input
Input
Input
Input
Table 6. Interrupt and Mode Control (continued)
Mode Select B/External Interrupt Request B—MODB/IRQB is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODB/IRQB
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
Mode Select C/External Interrupt Request C—MODC/IRQC is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
Mode Select D/External Interrupt Request D—MODD/IRQD is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD select
one of 16 initial chip operating modes, latched into OMR when the RESET signal
is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
Reset—RESET is an active-low, Schmitt-trigger input. When asserted, the chip
is placed in the Reset state and the internal phase generator is reset. The
Schmitt-trigger input allows a slowly rising input (such as a capacitor charging)
to reset the chip reliably. When the RESET signal is deasserted, the initial chip
operating mode is latched from the MODA, MODB, MODC and MODD inputs.
The RESET signal must be asserted during power up. A stable EXTAL signal
must be supplied while RESET is being asserted.
Internal Pull up resistor.
This input is 5 V tolerant.
DSP56371 Data Sheet, Rev. 4.1
Signal Description
Freescale Semiconductor
2
C mode.