EPM570GF100C5N Altera, EPM570GF100C5N Datasheet - Page 4

• Manufacturer Part Number: EPM570GF100C5N
• Description: IC MAX II CPLD 570 LE 100-FBGA
• Manufacturer: Altera
• Series: MAX® IIr

Specifications of EPM570GF100C5N

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 5.4ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 570
• Number Of Macrocells: 440
• Number Of I /o: 76
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-FBGA
• Voltage: 1.8V
• Memory Type: FLASH
• Number Of Logic Elements/cells: 570
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 544-1730

MAX II Device Family
EPM1270 ES
Device Issues
4
Preliminary
f
utilization, clock frequency, and toggle factors. You can estimate the
I
and/or the Quartus
For DEV_OE use with EPM2210G and EPM1270G devices, you should
only use this feature if you can guarantee your design’s I
the thresholds shown in
software, the DEV_OE feature does not use global resources but instead
uses dedicated circuitry to control the output enable on all design I/O
pins. For designs that cannot guarantee I
can use one of the four global signals to control device-wide output
enable (OE) control. Using a global signal OE instead of the DEV_OE pin
prevents the increase in POR trip voltage. The global signal OE requires
that you instantiate a tri-state buffer and connect an OE signal to all the
I/O pins in your design and assign the OE pin to a global signal in the
Quartus II software.
For in-system programming with EPM2210G and EPM1270G devices,
you should only use this feature if you can guarantee I
the threshold shown in
in-system programming begins. For designs that can operate with I
greater than the threshold, you must either ensure within the system that
the AC activity of the EPM2210G or EPM1270G device is reduced before
in-system programming begins or instead use the real-time ISP feature.
The real-time ISP feature does not raise the POR brown-out trigger
voltage, thus it will not be susceptible to failed in-system programming
during high switching current conditions. Using real-time ISP means the
design continues to run during the in-system programming process.
For more information on the real-time ISP feature, see the Using Real-time
ISP & ISP Clamp chapter of the MAX II Handbook.
The following issues and support constraints affect the MAX II EPM1270
ES devices:
■
CCINT
EPM2210G
EPM1270G
Table 3. EPM2210G & EPM1270G I
Voltage Issue with DEV_OE & In-System Programming
UFM block does not support program/write or erase operations
from the logic array interface
value by using the MAX II PowerPlay Early Power Estimator
Device
®
II Power Analyzer.
Table 3
Table
Current Threshold
for the running design immediately before
3. When enabled by the Quartus II
CCINT
500
300
Thresholds for Brown-Out Trigger
CCINT
is less the threshold, you
CCINT
Altera Corporation
CCINT
Units
mA
mA
is less than
is less than
CCINT