MT41J256M8HX-15E IT:D Micron Technology Inc, MT41J256M8HX-15E IT:D Datasheet - Page 4

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MT41J256M8HX-15E IT:D

Manufacturer Part Number
MT41J256M8HX-15E IT:D
Description
MICMT41J256M8HX-15E_IT:D 2GB DDR3 SDRAM
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Datasheet

Specifications of MT41J256M8HX-15E IT:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
-40C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Input Clock Frequency Change ...................................................................................................................... 123
Write Leveling ............................................................................................................................................... 125
Initialization ................................................................................................................................................. 130
Mode Registers .............................................................................................................................................. 132
Mode Register 0 (MR0) .................................................................................................................................. 133
Mode Register 1 (MR1) .................................................................................................................................. 137
Mode Register 2 (MR2) .................................................................................................................................. 141
Mode Register 3 (MR3) .................................................................................................................................. 144
MODE REGISTER SET (MRS) Command ........................................................................................................ 151
ZQ CALIBRATION Operation ......................................................................................................................... 152
ACTIVATE Operation ..................................................................................................................................... 153
READ Operation ............................................................................................................................................ 155
WRITE Operation .......................................................................................................................................... 166
PRECHARGE Operation ................................................................................................................................. 176
SELF REFRESH Operation ............................................................................................................................. 176
Extended Temperature Usage ........................................................................................................................ 178
Power-Down Mode ....................................................................................................................................... 179
RESET Operation ........................................................................................................................................... 187
On-Die Termination (ODT) ........................................................................................................................... 189
Dynamic ODT ............................................................................................................................................... 191
Synchronous ODT Mode ............................................................................................................................... 196
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf – Rev. K 04/10 EN
Write Leveling Procedure ........................................................................................................................... 127
Write Leveling Mode Exit Procedure ........................................................................................................... 129
Burst Length ............................................................................................................................................. 133
Burst Type ................................................................................................................................................ 134
DLL RESET ................................................................................................................................................ 135
Write Recovery .......................................................................................................................................... 135
Precharge Power-Down (Precharge PD) ..................................................................................................... 136
CAS Latency (CL) ....................................................................................................................................... 136
DLL Enable/DLL Disable ........................................................................................................................... 137
Output Drive Strength ............................................................................................................................... 138
OUTPUT ENABLE/DISABLE ...................................................................................................................... 138
TDQS Enable ............................................................................................................................................. 138
On-Die Termination .................................................................................................................................. 139
WRITE LEVELING ..................................................................................................................................... 139
POSTED CAS ADDITIVE Latency ................................................................................................................ 139
CAS Write Latency (CWL) ........................................................................................................................... 141
AUTO SELF REFRESH (ASR) ...................................................................................................................... 142
SELF REFRESH TEMPERATURE (SRT) ....................................................................................................... 142
SRT vs. ASR ............................................................................................................................................... 143
DYNAMIC ODT ......................................................................................................................................... 143
MULTIPURPOSE REGISTER (MPR) ............................................................................................................ 144
MPR Functional Description ...................................................................................................................... 145
MPR Register Address Definitions and Bursting Order ................................................................................ 146
MPR Read Predefined Pattern .................................................................................................................... 151
DQ Input Timing ....................................................................................................................................... 174
Functional Representation of ODT ............................................................................................................. 189
Nominal ODT ........................................................................................................................................... 189
Functional Description .............................................................................................................................. 191
ODT Latency and Posted ODT ................................................................................................................... 196
Timing Parameters .................................................................................................................................... 196
ODT Off During READs .............................................................................................................................. 199
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x4, x8, x16 DDR3 SDRAM
© 2006 Micron Technology, Inc. All rights reserved.

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