MT41J256M8HX-15E IT:D Micron Technology Inc, MT41J256M8HX-15E IT:D Datasheet - Page 198

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MT41J256M8HX-15E IT:D

Manufacturer Part Number
MT41J256M8HX-15E IT:D
Description
MICMT41J256M8HX-15E_IT:D 2GB DDR3 SDRAM
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Datasheet

Specifications of MT41J256M8HX-15E IT:D

Organization
256Mx8
Address Bus
18b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
-40C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
165mA
Pin Count
78
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 115: Synchronous ODT (BC4)
Command
ODT
CK#
CKE
R
CK
TT
NOP
T0
NOP
T1
Notes:
NOP
T2
ODTH4
ODTL on = WL - 2
NOP
1. WL = 7. R
2. ODT must be held HIGH for at least ODTH4 after assertion (T1).
3. ODT must be kept HIGH ODTH4 (BC4) or ODTH8 (BL8) after the WRITE command (T7).
4. ODTH is measured from ODT first registered HIGH to ODT first registered LOW or from the registration of the
5. Although ODTH4 is satisfied from ODT registered HIGH at T6, ODT must not go LOW before T11 as ODTH4 must
T3
WRITE command with ODT HIGH to ODT registered LOW.
also be satisfied from the registration of the WRITE command at T7.
NOP
T4
TT,nom
NOP
T5
is enabled. R
NOP
T6
t AON (MIN)
t AON (MAX)
WRS4
ODTL off = WL - 2
T7
TT(WR)
ODTH4 (MIN)
ODTL on = WL - 2
NOP
is disabled.
T8
R
TT,nom
ODTH4
NOP
T9
t AOF (MAX)
t AOF (MIN)
NOP
T10
NOP
T11
t AON (MIN)
t AON (MAX)
NOP
T12
ODTLoff = WL - 2
NOP
T13
R
TT,nom
NOP
T14
NOP
T15
Transitioning
NOP
T16
Don’t Care
t AOF (MIN)
t AOF (MAX)
NOP
T17

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