LC5512MV-45FN484C Lattice, LC5512MV-45FN484C Datasheet - Page 98

• Manufacturer Part Number: LC5512MV-45FN484C
• Description: CPLD ispXPLD™ 5000MV Family 150K Gates 512 Macro Cells 275MHz EECMOS Technology 3.3V 484-Pin BGA
• Manufacturer: Lattice

Specifications of LC5512MV-45FN484C

• Package: 484BGA
• Family Name: ispXPLD™ 5000MV
• Device System Gates: 150000
• Number Of Macro Cells: 512
• Maximum Propagation Delay Time: 4.5 ns
• Number Of User I/os: 253
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 275 MHz
• Number Of Product Terms Per Macro: 160
• Memory Type: EEPROM/SRAM
• Ram Bits: 262144
• Operating Temperature: 0 to 90 °C

Lattice Semiconductor
For Further Information
In addition to this data sheet, the following technical
notes may be helpful when designing with the ispXPLD
5000MX family:
LC5512MV
LC5768MV
LC51024MV
LC5256MV
LC5512MV
LC5768MV
LC51024MV
Device
Device
• TN1000 –
• TN1003 –
• TN1031 –
• TN1030 –
• TN1026 –
Devices
ispXPGA, ispGDX2, ispXPLD and ispMACH
5000VG Devices
5000MX Devices
Devices
lines
LC5512MV-45QN208C
LC5512MV-75QN208C
LC5512MV-45FN256C
LC5512MV-75FN256C
LC5512MV-45FN484C
LC5512MV-75FN484C
LC5768MV-5FN256C
LC5768MV-75FN256C
LC5768MV-5FN484C
LC5768MV-75FN484C
LC51024MV-52FN484C
LC51024MV-75FN484C
LC51024MV-52FN672C
LC51024MV-75FN672C
LC5256MV-5FN256I
LC5256MV-75FN256I
LC5512MV-75QN208I
LC5512MV-75FN256I
LC5512MV-75FN484I
LC5768MV-75FN256I
LC5768MV-75FN484I
LC51024MV-75FN484I
LC51024MV-75FN672I
sysIO Usage Guidelines for Lattice
sysCLOCK PLL Usage Guide for
Power Estimation in ispXPLD
Using Memory in ispXPLD 5000MX
ispXP Configuration Usage Guide-
Part Number
Part Number
ispXPLD 5000MV (3.3V) Lead-Free Commercial Devices (Continued)
ispXPLD 5000MV (3.3V) Lead-Free Industrial Devices
Macrocells Voltage (V) t
Macrocells Voltage (V) t
1024
1024
1024
1024
1024
1024
512
512
512
512
512
512
768
768
768
768
256
256
512
512
512
768
768
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
94
PD
PD
4.5
7.5
4.5
7.5
4.5
7.5
5.0
7.5
5.0
7.5
5.2
7.5
5.2
7.5
5.0
7.5
7.5
7.5
7.5
7.5
7.5
7.5
7.5
(ns)
(ns)
ispGDX2V/B/C Family Data Sheet
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free fpBGA
Lead-free PQFP
Lead-free PQFP
Lead-free PQFP
Package
Package
Pin/Ball
Pin/Ball
Count
Count
208
208
256
256
484
484
256
256
484
484
484
484
672
672
256
256
208
256
484
256
484
484
672
149
149
193
193
253
253
193
193
317
317
317
317
381
381
141
141
149
193
253
193
317
317
381
I/O
I/O
Grade
Grade
C
C
C
C
C
C
C
C
C
C
C
C
C
C
I
I
I
I
I
I
I
I
I