LC5512MV-45FN484C Lattice, LC5512MV-45FN484C Datasheet - Page 71

• Manufacturer Part Number: LC5512MV-45FN484C
• Description: CPLD ispXPLD™ 5000MV Family 150K Gates 512 Macro Cells 275MHz EECMOS Technology 3.3V 484-Pin BGA
• Manufacturer: Lattice

Specifications of LC5512MV-45FN484C

• Package: 484BGA
• Family Name: ispXPLD™ 5000MV
• Device System Gates: 150000
• Number Of Macro Cells: 512
• Maximum Propagation Delay Time: 4.5 ns
• Number Of User I/os: 253
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 275 MHz
• Number Of Product Terms Per Macro: 160
• Memory Type: EEPROM/SRAM
• Ram Bits: 262144
• Operating Temperature: 0 to 90 °C

Lattice Semiconductor
ispXPLD 5768MX Logic Signal Connections (Continued)
sysIO Bank LVDS Pair
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
-
-
-
-
-
-
-
-
-
-
-
-
10N
11N
12N
13N
14N
10P
11P
12P
13P
14P
0P
0N
1P
1N
2P
2N
3P
3N
4P
4N
5P
5N
6P
6N
7P
7N
8P
8N
9P
9N
-
-
-
-
-
-
-
-
-
-
-
-
-
Primary Macrocell/
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
PROGRAMB
A30/DATA0
A28/DATA1
A26/DATA2
A24/DATA3
A22/DATA4
A20/DATA5
A18/DATA6
A16/DATA7
A10/READ
A14/INITB
Function
A12/CSB
A8/CCLK
VCCO1
VCCO1
VCCO1
DONE
GND
TCK
TDO
VCC
B30
B28
B26
B24
B22
B20
B18
B14
B12
B10
A6
A4
A2
A0
B8
B4
B0
B6
B2
Macrocell 1
C10
C11
D10
D12
C12
C13
C14
C15
Alternate Outputs
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
D0
D2
D4
D6
D8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
67
Macrocell 2
A10
A11
A12
A13
A14
A15
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ispXPLD 5000MX Family Data Sheet
Alternate
Inputs
A31
A29
A27
A25
A23
A21
A19
A17
A15
A13
A11
B31
B29
B27
B25
B23
B21
B19
B15
B13
B11
A9
A7
A5
A3
A1
B9
B7
B5
B3
B1
-
-
-
-
-
-
-
-
-
-
-
-
GND (Bank 1) GND (Bank 1)
GND (Bank 1) GND (Bank 1)
GND (Bank 1) GND (Bank 1)
Ball Number
256 fpBGA
VCCO1
VCCO1
VCCO1
GND
VCC
M1
M2
M3
M4
M6
K2
K3
K4
K5
N1
P1
N2
P2
R1
R2
N3
P4
N5
R3
L2
L3
L5
L4
T2
T3
J6
J3
J5
J4
—
—
—
—
—
—
Ball Number
484 fpBGA
VCCO1
VCCO1
VCCO1
GND
VCC
AA3
AB3
AA4
AB2
AB4
AB5
W1
W2
W3
W6
W5
T1
V1
Y1
P3
R3
T2
U2
V2
R4
T4
R6
R5
U3
V3
Y2
U5
T5
U4
V4
Y4
U6
V5
U7
T6