MT48H8M16LFB4-75 IT:J TR Micron Technology Inc, MT48H8M16LFB4-75 IT:J TR Datasheet - Page 75

• Manufacturer Part Number: MT48H8M16LFB4-75 IT:J TR
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M16LFB4-75 IT:J TR

• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 8/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 70mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Revision History: Commands, Operations, and Timing Diagrams
Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10/08
Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7/08
Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5/08
Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4/08
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
• “Deep Power-Down” on page 72: Added description for exiting DPD.
• Updated address/data range presentation to industry-standard presentation.
• Replaced “MODE REGISTER SET” with “LMR” as appropriate.
• Table 17, “Truth Table – Current State Bank n, Command to Bank m,” on page 32, Note
• “Mode Register” on page 36: Corrected presentation of mode register bits.
• “Partial-Array Self Refresh (PASR)” on page 40: Updated refresh options presentation.
• “Auto Precharge” on page 57: Added fourth paragraph regarding
• Figure 40: “Single READ With Auto Precharge,” on page 62: Updated figure.
• Figure 45: “WRITE Without Auto Precharge,” on page 66: Updated note to BL = 4.
• Figure 46: “Single WRITE With Auto Precharge,” on page 67: Updated figure.
• Figure 47: “Single WRITE Without Auto Precharge,” on page 68: Updated figure.
• Added three-quarter drive strength content.
13: added missing “m.”
Revision History: Commands, Operations, and Timing Diagrams
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
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RAS lock-out.