MT48H8M16LFB4-75 IT:J TR Micron Technology Inc, MT48H8M16LFB4-75 IT:J TR Datasheet - Page 47

MT48H8M16LFB4-75 IT:J TR

Manufacturer Part Number
MT48H8M16LFB4-75 IT:J TR
Description
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Datasheet

Specifications of MT48H8M16LFB4-75 IT:J TR

Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
8/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
70mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
Figure 23:
PDF: 09005aef832ff1ea/Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr10_08__3.fm - Rev. E 4/09 EN
Terminating a READ Burst
Notes:
Continuous-page READ bursts can be truncated with a BURST TERMINATE command
and fixed-length READ bursts can be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which the last desired data element is
valid, where x = CL - 1. This is shown in Figure 23 for each possible CL; data element
n + 3 is the last desired data element of a longer burst.
1. DQM is LOW.
Command
Command
Address
Address
CLK
CLK
DQ
DQ
T0
Bank,
Col n
T0
READ
Bank,
READ
Col n
CL = 2
CL = 3
T1
T1
NOP
NOP
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
47
T2
T2
NOP
NOP
Dout
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
T3
NOP
NOP
Dout
n + 1
Dout
n
TERMINATE
TERMINATE
BURST
BURST
T4
T4
X = 1 cycle
Dout
n + 2
Dout
n + 1
Transitioning data
X = 2 cycles
T5
T5
NOP
NOP
Dout
n + 3
Dout
n + 2
©2008 Micron Technology, Inc. All rights reserved.
T6
T6
Timing Diagrams
NOP
NOP
Dout
n + 3
Don’t Care
T7
NOP

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