SCD240110QCM Intel, SCD240110QCM Datasheet - Page 125
SCD240110QCM
Manufacturer Part Number
SCD240110QCM
Description
Manufacturer
Intel
Datasheet
1.SCD240110QCM.pdf
(176 pages)
Specifications of SCD240110QCM
Operating Supply Voltage (max)
7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / Rohs Status
Not Compliant
- Current page: 125 of 176
- Download datasheet (3Mb)
8.5.1.2
Datasheet
Register Name: IER
Register Description: Interrupt Enable
Default Value: x’00
Access: Byte Read/Write
Mdm
Bit 7
Note: Because the CD2401 provides a unique Local Interrupt Vector register for each channel, the host
has the option to include the channel number within the interrupt vector.
Interrupt Enable Register (IER)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 6
0
Modem pin change detect enable
This is the Master interrupt enable for modem change detect functions. The host can
select which modem pins are monitored for input change and select either, or both,
directions of change by programming the change detect option bits in COR4 and
COR5. A Group 1-type interrupt (see LIVR description) is generated from this
enable.
Reserved – must be ‘0’.
Receive Exemption Timeout (Async mode)
This bit enables a Group 3 receive exception timeout interrupt when a receive data
timeout occurs with an empty receive FIFO. This provides a mechanism for the host
to manage a partially full receive buffer when receive data stops.
Reserved – must be ‘0’.
Receive Data
The receive FIFO threshold was reached in Interrupt Transfer mode, causing a
Group 3 receive data interrupt. Any receive exception causes a Group 3 receive
exception interrupt.
General timer(s) timeout enable
In Synchronous mode this bit enables a Group 1 interrupt when either timer reaches
zero.
Transmitter Empty
When enabled, a Group 2 interrupt is generated when the channel is completely
empty of transmit data.
Bit 5
RET
IT1
0
1
1
0
IT0
1
0
1
0
Bit 4
0
Multi-Protocol Communications Controller — CD2401
Group 1: modem signal change interrupt/general timer interrupt.
Group 2: transmit data interrupt.
Group 3: receive data interrupt.
Group 3: receive exception interrupt.
Bit 3
RxD
TIMER
Bit 2
Group/Type
Motorola Hex Address: x’11
TxMpty
Bit 1
Intel Hex Address: x’12
Bit 0
TxD
125
Related parts for SCD240110QCM
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Microprocessor: Intel Celeron M Processor 320 and Ultra Low Voltage Intel Celeron M Processor at 600MHz
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 82550 Fast Ethernet Multifunction PCI/CardBus Controller
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 120 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 64 Mbit. Access speed 150 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel StrataFlash memory 32 Mbit. Access speed 100 ns
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
DA28F640J5A-1505 Volt Intel StrataFlash Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
5 Volt Intel StrataFlash?? Memory
Manufacturer:
Intel Corporation
Part Number:
Description:
Intel 6300ESB I/O Controller Hub
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel 82801DB I/O Controller Hub (ICH4), Pb-Free SLI
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel 82801FB I/O Controller Hub (ICH6)
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Intel Strataflash Memory28F128J3 28F640J3 28F320J3
Manufacturer:
Intel Corporation
Datasheet:
Part Number:
Description:
Controllers, Intel 430TX PCIset: 82439TX System Controller (MTXC)
Manufacturer:
Intel Corporation