ADBM-A350-200 Avago Technologies US Inc., ADBM-A350-200 Datasheet - Page 9

• Manufacturer Part Number: ADBM-A350-200
• Description: Vigor Colossus OFN Module
• Manufacturer: Avago Technologies US Inc.

Specifications of ADBM-A350-200

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

I/O Pin Status Test
This feature allows the user to verify the connectivity and
the state of the I/O pin.
To run the test for input pins such as GPIO, SHUTDOWN,
NRST and IO_SELECT, fi rst enable the PAD_Chk_On bit (or
bit-1) of OFN_ENGINE2 (0x61) register. Then write any value
to PAD_STATUS (0x31) register to start the test. Wait for ap-
proximately 12us before reading the actual pin status and
PAD_STATUS register. The test will be considered a PASS to
indicate the sensor is responding accordingly if the actual
pin status matches PAD_STATUS register content. Refer to
the table below for I/O pin status defi nition.
9
Bit(s)
7:6
5:4
3:2
1:0
Name
NRST_STATE
SHUTDOWN_STATE
GPIO_STATE
IO_SELECT_STATE
Reset
0x0
0x0
0x0
0x0
Description
0x0: unknown
0x1: Low
0x2: High
0x3: Hi-Z
0x0: unknown
0x1: Low
0x2: High
0x3: Hi-Z
0x0: unknown
0x1: Low
0x2: High
0x3: Hi-Z
0x0: unknown
0x1: Low
0x2: High
0x3: Hi-Z
For output pins (EVENT_INT, GPIO, MOSI and MISO)
testing, fi rst enable bit-4 of PAD_FUNCTION (0x34)
register. Then program or set the output state via PAD_
TEST_OUT register (0x33) and do a READ on the actual
pin status. Actual pin status results should match the
output set in PAD_TEST_OUT. (Note: SPI/TWI communica-
tion will be disabled after this test is enabled. Once this
test is completed, an external hardware reset on sensor is
required)
Remarks
Invalid as the chip will be in reset state.
Indicate a fl oating high
Invalid as the chip will be in shutdown state.
Indicate a fl oating low