ADBM-A350-200 Avago Technologies US Inc., ADBM-A350-200 Datasheet - Page 15

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ADBM-A350-200

Manufacturer Part Number
ADBM-A350-200
Description
Vigor Colossus OFN Module
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADBM-A350-200

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
If the rising edge of SCLK for the last address bit of the read command occurs before the required delay (t
command may not complete correctly.
Figure 12. Timing between read and either write or subsequent read commands
During a read operation SCLK should be delayed at least
t
ADBM-A350 has time to prepare the requested data. The
falling edge of SCLK for the fi rst address bit of either the
read or write command must be at least t
the last SCLK rising edge of the last data bit of the previous
read operation.
Burst Mode Operation
Burst mode is a special serial port operation mode that
may be used to reduce the serial transaction time for a
motion read. The speed improvement is achieved by con-
tinuous data clocking from multiple registers without the
need to specify the register address, and by not requiring
the normal delay period between data bytes.
Figure 13. Motion Burst Timing
15
SCLK
SCLK
SRAD
after the last address data bit to ensure that the
Motion Register Address
Address
First Read Operation
Read First Byte
t
SRAD
Read Operation
SRR
t
SRAD
or t
SRW
after
Read Second Byte
Burst mode is activated by writing 0x10 to register 0x1c
IO_MODE. Then the burst mode data can be read by
reading the Motion register 0x02. The ADBM-A350 will
respond with the contents of the Motion, Delta_Y, Delta_X,
SQUAL, Shutter_Upper, Shutter_Lower and Maximum_
Pixel registers in that order. The burst transaction can be
terminated after the fi rst 3 bytes of the sequence are read
by bringing the NCS pin high. After sending the register
address, the micro-controller must wait t
begin reading data. All data bits can be read with no delay
between bytes by driving SCLK at the normal rate. The data
is latched into the output buff er after the last address bit
is received. After the burst transmission is complete, the
micro-controller must raise the NCS line for at least t
to terminate burst mode. The serial port is not available
for use until it is reset with NCS, even for a second burst
transmission.
Read Third Byte
Data
t
SRW
& t
Write Operation
SRR
Next Read or
Address
SRAD
SWR
), the write
and then
BEXIT

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