TWR-K53N512-KIT Freescale Semiconductor, TWR-K53N512-KIT Datasheet - Page 30

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TWR-K53N512-KIT

Manufacturer Part Number
TWR-K53N512-KIT
Description
TWR-K53N512 Dev Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr
Datasheets

Specifications of TWR-K53N512-KIT

Kit Contents
TWR-K53N512 - 32bit MCU Module With MK53N512CMD100 & TWRPI-SLCD Daughter Card, DVD With IDE Software
Mcu Supported Families
K50
Kit Features
MK53N512CMD100 MAPBGA 144 Pins MCU, Tower
Rohs Compliant
Yes
Contents
Board
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Tower System
Timers
4.5.5.4 Voltage Reference (VREF)
4.5.5.5 General Purpose Operational Amplifier (OPAMP)
4.5.5.6 Trans-Impedance Amplifier (TRIAMP)
4.5.6
4.5.6.1 Programmable Delay Block (PDB)
30
• Automatic mode allows the DAC to generate its own output waveforms including square, triangle, and sawtooth
• Automatic mode allows programmable period, update rate, and range
• DMA support with configurable watermark level
• Programmable trim register with 0.5mV steps, automatically loaded with room temp value upon reset
• Programmable mode selection:
• 1.2V output at room temperature
• Dedicated output pin
• 1.71 - 3.6V VDD operation
• Programmable voltage gain
• On-chip generation of bias voltages
• Low-power, low-voltage CMOS technology
• Low-input offset voltage and current
• Low-input bias current
• Low-current consumption
• 1.71 - 3.6V VDD operation
• On-chip generation of bias voltages
• Low-power, low voltage CMOS technology
• Low-input offset voltage and current
• Low-input bias current
• Low-current consumption
• Up to 15 trigger input sources and software trigger source
• Up to eight configurable PDB channels for ADC hardware trigger
• Off
• Bandgap out (or stabilization delay)
• Low-power buffer mode
• Tight-regulation buffer mode
• One PDB channel is associated with one ADC.
• One trigger output for ADC hardware trigger and up to eight pre-trigger outputs for ADC trigger select per PDB
• Trigger outputs can be enabled or disabled independently.
• One 16-bit delay register per pre-trigger output
• Optional bypass of the delay registers of the pre-trigger outputs
• Operation in One-Shot or Continuous modes
Timers
channel
K50 Family Product Brief, Rev. 8, 5/2011
Freescale Semiconductor, Inc.

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