AD7927BRUZ Analog Devices Inc, AD7927BRUZ Datasheet - Page 15

IC ADC 12BIT 8CH 200KSPS 20TSSOP

AD7927BRUZ

Manufacturer Part Number
AD7927BRUZ
Description
IC ADC 12BIT 8CH 200KSPS 20TSSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7927BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
200k
Number Of Converters
1
Power Dissipation (max)
7.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
200kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
1.5mA
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
200KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
2.5/5V
Differential Input
No
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
7.5mW
Differential Linearity Error
-0.9LSB/1.5LSB
Integral Nonlinearity Error
±1LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Input Signal Type
Single-Ended
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7927CBZ - BOARD EVALUATION FOR AD7927
Lead Free Status / Rohs Status
Compliant

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Full Shutdown (PM1 = 1, PM0 = 0)
In this mode, all internal circuitry on the AD7927 is powered down.
The part retains information in the Control Register during full
shutdown. The AD7927 remains in full shutdown until the power
management bits in the Control Register, PM1 and PM0, are
changed.
If a write to the Control Register occurs while the part is in full
shutdown, with the power management bits changed to PM0 =
PM1 = 1, Normal Mode, the part will begin to power up on the
CS rising edge. The track and hold that was in hold while the
part was in full shutdown will return to track on the 14th SCLK
falling edge. A full 16 SCLK transfer must occur to ensure the
Control Register contents are updated; however, the DOUT
line will not be driven during this wake-up transfer.
To ensure that the part is fully powered up, t
elapsed before the next CS falling edge; otherwise, invalid data
DOUT
REV. 0
SCLK
DOUT
DIN
SCLK
CS
PART IS IN FULL
SHUTDOWN
DIN
CS
DOUT
NOTES
1. CONTROL REGISTER DATA IS LOADED ON FIRST 12 SCLK CYCLES
2. SHADOW REGISTER DATA IS LOADED ON FIRST 16 SCLK CYCLES
SCLK
DIN
CS
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS, PM1
DATA IN TO CONTROL/SHADOW REGISTER
Figure 12. Normal Mode Operation
1
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCKS. PM1 = 1, PM0 = 1
1 LEADING ZERO + 3 CHANNEL IDENTIFIER BITS
1
1
DATA IN TO CONTROL REGISTER/
+ CONVERSION RESULT
SHADOW REGISTER
DATA IN TO CONTROL REGISTER
0, PM0
12
PART ENTERS
SHUTDOWN ON CS
RISING EDGE AS
PM1
12
1
0, PM0
16
Figure 14. Auto Shutdown Mode Operation
POWER UP
PART BEGINS TO POWER UP ON
CS RISING EDGE AS PM1 = PM0 = 1
Figure 13. Full Shutdown Mode Operation
16
1
PART BEGINS
TO POWER
UP ON CS
FALLING EDGE
should have
CONTROL REGISTER SHOULD NOT
CHANGE, WRITE BIT
1
14
DUMMY CONVERSION
16
INVALID DATA
–15–
t
0
will be read if a conversion is initiated before this time. Figure 13
shows the general diagram for this sequence.
Auto Shutdown (PM1 = 0, PM0 = 1)
In this mode, the AD7927 automatically enters shutdown at the
end of each conversion when the Control Register is updated. When
the part is in shutdown, the track and hold is in Hold Mode.
Figure 14 shows the general diagram of the operation of the
AD7927 in this mode. In Shutdown Mode all internal circuitry on
the AD7927 is powered down. The part retains information in
the Control Register during shutdown. The AD7927 remains in
shutdown until the next CS falling edge it receives. On this CS
falling edge, the track and hold that was in hold while the part
was in shutdown will return to track. Wake-up time from auto
shutdown is 1 ms maximum, and the user should ensure that
1 ms has elapsed before attempting a valid conversion. When
running the AD7927 with a 20 MHz clock, one dummy 16 SCLK
transfer should be sufficient to ensure the part is fully powered
up. During this dummy transfer the contents of the Control
Register should remain unchanged; therefore the WRITE bit
should be 0 on the DIN line.
Depending on the SCLK frequency used, this dummy transfer
may affect the achievable throughput rate of the part, with every
other data transfer being a valid conversion result. If, for example,
the maximum SCLK frequency of 20 MHz was used, the auto
shutdown mode could be used at the full throughput rate of
200 kSPS without affecting the throughput rate at all. Only a
portion of the cycle time is taken up by the conversion time and the
dummy transfer for wake-up.
12
12
THE PART IS FULLY POWERED UP
ONCE
1
TO KEEP THE PART IN NORMAL MODE, LOAD
PM1 = PM0 = 1 IN CONTROL REGISTER
t
16
POWER UP
DATA IN TO CONTROL REGISTER/SHADOW REGISTER
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
HAS ELAPSED
PART IS FULLY
POWERED UP
CHANNEL IDENTIFIER BITS + CONVERSION RESULT
TO KEEP PART IN THIS MODE, LOAD PM1
IN CONTROL REGISTER OR SET WRITE BIT = 0
DATA IN TO CONTROL/SHADOW REGISTER
1
PART ENTERS
SHUTDOWN ON CS
RISING EDGE AS
PM1
12
AD7927
14
0, PM0
16
16
0, PM0
1
1

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