AD7927BRUZ Analog Devices Inc, AD7927BRUZ Datasheet - Page 12

IC ADC 12BIT 8CH 200KSPS 20TSSOP

AD7927BRUZ

Manufacturer Part Number
AD7927BRUZ
Description
IC ADC 12BIT 8CH 200KSPS 20TSSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7927BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
200k
Number Of Converters
1
Power Dissipation (max)
7.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
200kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
1.5mA
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
200KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
2.5/5V
Differential Input
No
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
7.5mW
Differential Linearity Error
-0.9LSB/1.5LSB
Integral Nonlinearity Error
±1LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Input Signal Type
Single-Ended
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7927CBZ - BOARD EVALUATION FOR AD7927
Lead Free Status / Rohs Status
Compliant

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AD7927
CIRCUIT INFORMATION
The AD7927 is a high speed, 8-channel, 12-bit, single supply,
A/D converter. The part can be operated from a 2.7 V to 5.25 V
supply. When operated from either a 5 V or 3 V supply, the AD7927
is capable of throughput rates of 200 kSPS. The conversion time
may be as short as 800 ns when provided with a 20 MHz clock.
The AD7927 provides the user with an on-chip track-and-hold,
A/D converter, and a serial interface housed in a 20-lead TSSOP
package. The AD7927 has eight single-ended input channels
with a channel sequencer, allowing the user to select a channel
sequence through which the ADC can cycle with each consecu-
tive CS falling edge. The serial clock input accesses data from
the part, controls the transfer of data written to the ADC, and
provides the clock source for the successive-approximation A/D
converter. The analog input range for the AD7927 is 0 V to
REF
the Control Register. For the 0 to 2 ¥ REF
must be operated from a 4.75 V to 5.25 V supply.
The AD7927 provides flexible power management options to
allow the user to achieve the best power performance for a given
throughput rate. These options are selected by programming the
Power Management bits, PM1 and PM0, in the Control Register.
CONVERTER OPERATION
The AD7927 is a 12-bit successive approximation analog-to-
digital converter based around a capacitive DAC. The AD7927
can convert analog input signals in the range 0 V to REF
to 2 ¥ REF
ADC. The ADC is comprised of Control Logic, SAR, and a
Capacitive DAC that are used to add and subtract fixed amounts
of charge from the sampling capacitor to bring the comparator
back into a balanced condition. Figure 5 shows the ADC during
its acquisition phase. SW2 is closed and SW1 is in position A.
The comparator is held in a balanced condition and the sampling
capacitor acquires the signal on the selected V
CS
CS
CS
IN
Figure 4. SEQ Bit = 1, SHADOW Bit = 1 Flowchart
or 0 V to 2 ¥ REF
IN
. Figures 5 and 6 show simplified schematics of the
CONTINUOUSLY CONVERTS ON THE SELECTED
SEQUENCE OF CHANNELS BUT WILL ALLOW
RANGE, CODING AND SO ON, TO CHANGE IN THE
CONTROL REGISTER WITHOUT INTERRUPTING
THE SEQUENCE, PROVIDED SEQ = 1 SHADOW = 0
DOUT: CONVERSION RESULT FROM CHANNEL 0
CONTINUOUSLY CONVERTS ON A CONSECUTIVE
SEQUENCE OF CHANNELS FROM CHANNEL 0 UP
TO AND INCLUDING THE PREVIOUSLY SELECTED
A2–A0 IN THE CONTROL REGISTER
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2–A0 FOR CONVERSION.
SEQ = 1 SHADOW = 1
DUMMY CONVERSION
DIN = ALL 1s
IN
, depending on the status of Bit 1 in
POWER-ON
IN
range, the part
IN
channel.
WRITE BIT = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
IN
or 0 V
–12–
When the ADC starts a conversion (see Figure 6), SW2 will
open and SW1 will move to position B, causing the comparator
to become unbalanced. The Control Logic and the Capacitive
DAC are used to add and subtract fixed amounts of charge
from the sampling capacitor to bring the comparator back into a
balanced condition. When the comparator is rebalanced, the
conversion is complete. The Control Logic generates the ADC
output code. Figures 8 and 9 show the ADC transfer functions.
Analog Input
Figure 7 shows an equivalent circuit of the analog input structure
of the AD7927. The two diodes D1 and D2 provide ESD pro-
tection for the analog inputs. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 300 mV. This will cause these diodes to become forward
biased and start conducting current into the substrate. 10 mA is
the maximum current these diodes can conduct without causing
irreversible damage to the part. The capacitor C1 in Figure 7 is
typically about 4 pF and can primarily be attributed to pin capaci-
tance. The resistor R1 is a lumped component made up of the on
resistance of a switch (track-and-hold switch) and also includes
the on resistance of the input multiplexer. The total resistance is
typically about 400 W. The capacitor C2 is the ADC sampling
capacitor and has a capacitance of 30 pF typically. For ac appli-
cations, removing high frequency components from the analog
input signal is recommended by use of an RC low-pass filter on
the relevant analog input pin. In applications where harmonic
distortion and signal to noise ratio are critical, the analog input
should be driven from a low impedance source. Large source
impedances will significantly affect the ac performance of the ADC.
This may necessitate the use of an input buffer amplifier. The
choice of the op amp will be a function of the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum source
impedance will depend on the amount of total harmonic distortion
(THD) that can be tolerated. The THD will increase as the source
impedance increases, and performance will degrade. (See TPC 5.)
V
V
IN
IN
V
V
AGND
0
7
IN
IN
.
.
AGND
0
7
V
IN
Figure 7. Equivalent Analog Input Circuit
4pF
C1
Figure 5. ADC Acquisition Phase
Figure 6. ADC Conversion Phase
SW1
A
SW1
A
B
B
D1
D2
AV
DD
SW2
4k
CONVERSION PHASE: SWITCH OPEN
TRACK PHASE: SWITCH CLOSED
SW2
4k
COMPARATOR
COMPARATOR
R1
30pF
CAPACITIVE
C2
CAPACITIVE
CONTROL
DAC
LOGIC
CONTROL
LOGIC
DAC
REV. 0

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