MAXQ3181-RAN+ Maxim Integrated Products, MAXQ3181-RAN+ Datasheet - Page 14

IC AFE POLYPHASE LO-PWR 28-TSSOP

MAXQ3181-RAN+

Manufacturer Part Number
MAXQ3181-RAN+
Description
IC AFE POLYPHASE LO-PWR 28-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAXQ3181-RAN+

Number Of Channels
8
Power (watts)
35mW
Voltage - Supply, Analog
3.3V
Voltage - Supply, Digital
3.3V
Package / Case
28-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Bits
-
Low-Power, Active Energy, Polyphase AFE
Entry into Stop Mode only occurs at the request of the
master. To place the MAXQ3181 into Stop Mode, the
master must read the ENTER STOP (0xC02) register.
Once this register has been read, the MAXQ3181
enters Stop Mode immediately, before the transmission
of the final ACK byte by the MAXQ3181.
There are three possible ways to bring the MAXQ3181
back out of Stop Mode.
• Power Cycle. The MAXQ3181 automatically exits
• External Reset. The MAXQ3181 exits Stop Mode if
• External Interrupt. Driving the SSEL pin low causes
Note that when the master is communicating with the
Figure 1. External Reset
14
Stop Mode if a power-on reset occurs. Following exit
from Stop Mode, all registers are cleared back to
their default states, and the MAXQ3181 transitions to
Initialization Mode.
an external reset is triggered by driving RESET low.
Once the RESET pin is released and allowed to
return to a high state, the MAXQ3181 comes out of
reset and goes into Initialization Mode. All registers
are cleared to their default states when exiting Stop
Mode in this manner.
the MAXQ3181 to exit Stop Mode without undergoing
a reset cycle. When exiting Stop Mode in this man-
ner, all register and configuration settings are
retained, and the MAXQ3181 automatically resumes
electric-metering functions and sample processing.
______________________________________________________________________________________
SAMPLING
INTERNAL
CLOCK
RESET
RESET
RESET
MAXQ3181, the SSEL line is normally driven low at the
beginning of each SPI command. This means that if the
master sends an SPI command after the MAXQ3181
enters Stop Mode, the MAXQ3181 automatically exits
Stop Mode.
There are several different sources that can cause the
MAXQ3181 to undergo a reset cycle. For any type of
hardware reset, the RESET pin is driven low when a
reset occurs.
This hardware reset is initiated by an external source
(such as the master controller or a manual pushbutton
press) driving the RESET pin on the MAXQ3181 low.
The RESET line must be held low for at least four cycles
of the currently selected clock for the external reset to
take effect. Once the external reset takes effect, it
remains in effect indefinitely as long as RESET is held
low. Once the external reset has been released, the
MAXQ3181 clears all registers to their default states
and resumes execution in Initialization Mode.
When an external reset occurs outside of Stop Mode,
execution (in Initialization Mode) resumes after four
cycles of the currently selected clock (external high-fre-
quency crystal for Run Mode, 1MHz internal RC oscilla-
tor for LOWPM Mode). As the MAXQ3181 enters
Initialization Mode, the LOWPM bit is always cleared
BEGIN RUNNING IN INITIALIZATION MODE
Reset Sources
External Reset

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