LM9833CCVJD/NOPB National Semiconductor, LM9833CCVJD/NOPB Datasheet - Page 33

• Manufacturer Part Number: LM9833CCVJD/NOPB
• Description: IC USB IMAGE SCAN 48BIT 100-TOFP
• Manufacturer: National Semiconductor

Specifications of LM9833CCVJD/NOPB

• Number Of Bits: 16
• Number Of Channels: 3
• Voltage - Supply, Analog: 5V
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: *LM9833CCVJD; *LM9833CCVJD/NOPB; LM9833CCVJD

Applications Information
of the PAPER SENSE inputs becomes True (if that sensor has
been properly programmed to interrupt scanner movement).
PAPER SENSE 2 can be used to cause a delayed stop. If the
FullSteps to Scan after PAPER SENSE 2 trips register is
greater than 0, motor movement will continue for the pro-
grammed number of full steps. This can be used to eject paper in
sheetfed scanners.
The LM9833 also features a Programmed High Speed Forward
command. This is identical to the High Speed Forward function,
except that it will automatically stop moving once the motor has
moved the number of lines specified in registers 4A and 4B.
8.4 High Speed Reverse
When register 07 is set to a 2, the LM9833 moves the motor
backwards at maximum speed (determined by the fast feed step-
size, registers 48 and 49) until a 0 is written to register 07 or
either one of the PAPER SENSE inputs becomes True (if that
sensor has been properly programmed to interrupt scanner
movement). The FullSteps to Scan after PAPER SENSE 2 trips
register is not used in the High Speed Reverse mode. This func-
tion is generally used to home the sensor in flatbed scanning
applications.
The LM9833 also features a Programmed High Speed Reverse
command. This is identical to the High Speed Reverse function,
except that it will automatically stop moving once the motor has
moved the number of lines specified in registers 4A and 4B.
8.5 Short Example of a Scan
• PC configures the LM9833 by writing to the configuration regis-
• PC has the LM9833 scan a calibration image, then calculates
• PC transmits the calibration information to the LM9833.
• If a sheetfed, the PC now polls the LM9833 status registers to
• PC sets the Scanning bit in the Configuration Register.
• PC calculates the size of the image to be scanned in bytes,
• After all image data is read, PC writes a 0 to register 07 to stop
• If this is a flatbed scanner, the PC should now send a High
• The scanner is now in the idle state.
9.0 Master Clock Source
The timing for the entire chip comes from the CRYSTAL OUT pin.
Typically this pin is used (with the CRYSTAL IN pin) as a crystal
oscillator. The clock frequency should be 48MHz. This 48MHz
clock is divided by the MCLK divider (register 08), and the divided
output is MCLK (Master CLocK). The MCLK divider range is from
1.0 to 32.5 in steps of 0.5. A configuration register code of 0
divides the clock by 1.0, while a code of 63 divides the clock by
ters.
the calibration coefficients for the scanner.
see if there is any paper inserted. If a flatbed, it moves the scan
head to the home position.
then reads bulk data from register 00 of the LM9833 until it has
read the entire image. If for some reason the scan needs to be
aborted, the PC writes a 0 to register 07.
scan.
Speed Reverse command to send the sensor back to the home
position. For a sheetfeeder, it can send a High Speed Forward
command to eject the remainder of the image.
(Continued)
33
32.5. AT 48MHz, this provides an MCLK range of 1.48MHz to
48MHz and a corresponding ADC conversion rate of 184kHz to
6.00MHz. This divider can be used to closely match the output
data rate to the PC’s input data rate, minimizing scan time.
MCLK is used to clock the vast majority of the LM9833’s circuits.
CRYSTAL OUT is directly used in the USB I/O section, DRAM
timing, and a few subsections where the highest possible clock
speed is required (such as the PWM pulse generator for the light
source and the stepper motors).
To use the LM9833’s crystal oscillator feature, tie the CRYS-
TAL/EXT CLK pin to DGND. Figure 46 shows the recommended
loading circuit and values for a 48MHz oscillator. These compo-
nent values assume 10pF of stray capacitance between CRYS-
TAL IN and ground, and 10pF between CRYSTAL OUT and
ground, for a total CRYSTAL IN and CRYSTAL OUT loading of
15pF and 25pF.
A 2.7k pullup to a 5V source is necessary to ensure oscillator
start-up. For self-powered systems, any clean source of +5V can
be used. For bus-powered systems, this pin must be connected
to the ACTIVE/SUSPENDED pin in order to meet USB suspend
power consumption requirements.
When laying out the crystal oscillator components, always keep
the traces as short as possible, to minimize stray capacitance
and inductive noise coupling, particularly on the CRYSTAL IN pin.
Operation at 24MHz (24/48 = V
be used.
To drive the LM9833 with an external 48MHz clock, tie CRYS-
TAL/EXT CLK (pin 54) to V
drive the TTL or CMOS-level clock signal into CRYSTAL_OUT
(pin 52).
10.0 INITIALIZATION
10.1 Power On Reset (POR)
POR is generated by the ramp of the V
+5V. A low to high to low signal on the external RESET pin will
also generate a POR. A POR event:
• Resets the USB transceiver. All enumeration and configuration
• The oscillator will start (or continue) oscillating.
• Forces all configuration registers that have defaults (shown as
• MISC I/O 1-3 will be configured as inputs and could generate
data will be reset to its default setting.
black boxes in the configuration register tables) to their default
settings (including the Reset and Standby bits). See the Reset
and Standby mode descriptions for more information.
CRYSTAL
IN
Figure 46: 48 MHz Crystal Oscillator Circuit
5pF
Overtone Crystal
C1
EC-T-48.000M
48MHz Third
Ecliptek
15pF
C2
D
, tie CRYSTAL_IN to DGND, and
D
ACTIVE/SUSPENDED pin
) is not reliable and should not
10Ω
1.2µH
300pF
or +5V (see text)
A
supply pins from 0V to
24/48 = DGND
2.7k
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CRYSTAL
OUT