IDT82V3380PFG IDT, Integrated Device Technology Inc, IDT82V3380PFG Datasheet - Page 60

• Manufacturer Part Number: IDT82V3380PFG
• Description: IC PLL WAN SYNC ETH 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3380PFG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3380PFG

6
dard except the following:
Table 43: JTAG Timing Characteristics
JTAG
IDT82V3380
This device is compliant with the IEEE 1149.1 Boundary Scan stan-
The JTAG interface timing diagram is shown in
• The output boundary scan cells do not capture data from the
• The TRST pin is set low by default and JTAG is disabled in order
Symbol
core and the device does not support EXTEST instruction;
to be consistent with other manufacturers.
t
TCK
t
t
t
S
H
D
TCK
TMS
TDI
JTAG
TMS / TDI to TCK setup time
TCK to TMS / TDI Hold Time
TCK to TDO delay time
TCK period
Parameter
TDO
t
S
Figure 26. JTAG Interface Timing Diagram
Figure
26.
t
H
60
t
TCK
Min
100
25
25
t
D
Typ
SYNCHRONOUS ETHERNET WAN PLL
Max
50
May 19, 2009
Unit
ns
ns
ns
ns