ICS570A IDT, Integrated Device Technology Inc, ICS570A Datasheet - Page 3

• Manufacturer Part Number: ICS570A
• Description: IC MULTIPLIER/ZDB 8-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: ClockBlocks™r
• Type: Fanout Distribution, Spread Spectrum Clock Generator, Zero Delay Bufferr

Specifications of ICS570A

• Pll: Yes
• Input: Clock
• Output: CMOS
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 170MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 170MHz
• Number Of Elements: 1
• Supply Current: 25mA
• Pll Input Freq (min): 1.5MHz
• Pll Input Freq (max): 75MHz
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC N
• Output Frequency Range: 10 to 170MHz
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Commercial
• Pin Count: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Pin Descriptions
External Components
Recommended Circuit
IDT™ / ICS™ MULTIPLIER AND ZERO DELAY BUFFER
ICS570
MULTIPLIER AND ZERO DELAY BUFFER
CLK/2
The ICS570 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be connected
close to the part to minimize lead inductance. No external power supply filtering is required for this device. A 33Ω
series terminating resistor can be used next to each output pin.
Number
GND
Input
VDD
ICLK
CLK
Pin
1
2
3
4
5
6
7
8
S1
x2 Mode (S1, S0 = 1, 1)
CLK/2
Name
GND
ICLK
FBIN
VDD
CLK
Pin
S1
S0
CLK Feedback
FBIN
Output
Output
Power
Power
Input
Input
Input
Input
Type
Pin
S0
Select 1 for output clock. Connect to GND, VDD, or float per decoding
Connect to +3.3 V (ICS570B). Connect to +5.0 V (ICS570A).
Connect to ground.
Reference clock input.
Feedback clock input.
Select 0 for output clock. Connect to GND, VDD, or float per decoding
Clock output per table above.
Clock output per table above. Low skew divide by two of pin 7 clock.
CLK
CLK/2
3
CLK/2
Pin Description
ICLK
CLK
x2 Mode (S1, S0 = 1, 0)
CLK/2 Feedback
ICS570
ZDB AND MULTIPLIER
REV K 073007