ADF4112BRUZ Analog Devices Inc, ADF4112BRUZ Datasheet

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ADF4112BRUZ

Manufacturer Part Number
ADF4112BRUZ
Description
IC SYNTH PLL RF 3.0GHZ 16-TSSOP
Manufacturer
Analog Devices Inc
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of ADF4112BRUZ

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
2:1
Differential - Input:output
Yes/No
Frequency - Max
3GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
3GHz
Pll Type
Frequency Synthesis
Frequency
3GHz
Supply Current
6.5mA
Supply Voltage Range
2.7V To 5.5V
Digital Ic Case Style
TSSOP
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF4112EBZ1 - BOARD EVAL FOR ADF4112EVAL-ADF411XEBZ1 - BOARD EVAL FOR ADF411X NO CHIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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FEATURES
ADF4110: 550 MHz; ADF4111: 1.2 GHz; ADF4112: 3.0 GHz;
2.7 V to 5.5 V power supply
Separate charge pump supply (V
Programmable dual-modulus prescaler 8/9, 16/17, 32/33,
Programmable charge pump currents
Programmable antibacklash pulse width
3-wire serial interface
Analog and digital lock detect
Hardware and software power-down mode
APPLICATIONS
Base stations for wireless radio (GSM, PCS, DCS, CDMA,
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Wireless LANS
Communications test equipment
CATV equipment
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
ADF4113: 4.0 GHz
voltage in 3 V systems
64/65
WCDMA)
REF
RF
RF
DATA
CLK
IN
IN
LE
IN
A
B
CE
INPUT REGISTER
24-BIT
PRESCALER
FUNCTION
AGND
P
) allows extended tuning
AV
LATCH
P/P +1
FROM
SD
DD
OUT
N = BP + A
22
DV
DGND
DD
LOAD
LOAD
B COUNTER
A COUNTER
A, B COUNTER
FUNCTIONAL BLOCK DIAGRAM
R COUNTER
R COUNTER
FUNCTION
13-BIT
6-BIT
LATCH
LATCH
LATCH
14-BIT
13
6
Figure 1. Functional Block Diagram
14
ADF4110/ADF4111/ADF4112/ADF4113
19
ADF4110/ADF4111
ADF4112/ADF4113
RF PLL Frequency Synthesizers
GENERAL DESCRIPTION
The ADF4110 family of frequency synthesizers can be used to
implement local oscillators in the upconversion and downcon-
version sections of wireless receivers and transmitters. They
consist of a low noise digital PFD (phase frequency detector), a
precision charge pump, a programmable reference divider,
programmable A and B counters, and a dual-modulus prescaler
(P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction
with the dual-modulus prescaler (P/P + 1), implement an N
divider (N = BP + A). In addition, the 14-bit reference counter
(R counter) allows selectable REFIN frequencies at the PFD
input. A complete phase-locked loop (PLL) can be implemented
if the synthesizer is used with an external loop filter and voltage
controlled oscillator (VCO).
Control of all the on-chip registers is via a simple 3-wire
interface. The devices operate with a power supply ranging from
2.7 V to 5.5 V and can be powered down when not in use.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
V
P
FREQUENCY
DETECTOR
DETECT
PHASE
LOCK
CPGND
SD
AV
OUT
DD
CPI3 CPI2 CPI1 CPI6 CPI5 CPI4
SETTING 1
CURRENT
M3
© 2004 Analog Devices, Inc. All rights reserved.
MUX
M2 M1
REFERENCE
CHARGE
PUMP
SETTING 2
CURRENT
HIGH Z
R
SET
MUXOUT
CP
www.analog.com

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ADF4112BRUZ Summary of contents

Page 1

FEATURES ADF4110: 550 MHz; ADF4111: 1.2 GHz; ADF4112: 3.0 GHz; ADF4113: 4.0 GHz 2 5.5 V power supply Separate charge pump supply (V ) allows extended tuning P voltage systems Programmable dual-modulus prescaler 8/9, 16/17, ...

Page 2

ADF4110/ADF4111/ADF4112/ADF4113 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Characteristics..................................................................... 5 Absolute Maximum Ratings............................................................ 6 Transistor Count........................................................................... 6 ESD Caution.................................................................................. 6 Pin Configurations and Function Descriptions ........................... 7 Typical Performance Characteristics ............................................. 8 Circuit Description......................................................................... 12 Reference Input Section............................................................. 12 RF Input ...

Page 3

SPECIFICATIONS ± 10 ± 10 unless otherwise noted. Operating temperature range is as follows: B Version: −40°C to +85°C. MIN MAX Table 1. Parameter RF ...

Page 4

ADF4110/ADF4111/ADF4112/ADF4113 Parameter POWER SUPPLIES ( ADF4110 ADF4111 ADF4112 ADF4113 I P Low Power Sleep Mode NOISE CHARACTERISTICS ADF4113 Normalized Phase Noise Floor 7 Phase Noise Performance ...

Page 5

TIMING CHARACTERISTICS Guaranteed by design but not production tested. AV AGND = DGND = CPGND = SET Table 2. Parameter Limit MIN ...

Page 6

ADF4110/ADF4111/ADF4112/ADF4113 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted A Table 3. Parameter GND GND Digital I/O Voltage to GND Analog I/O ...

Page 7

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS SET ADF4110 ADF4111 14 CPGND 3 ADF4112 AGND 4 13 ADF4113 TOP VIEW (Not to Scale ...

Page 8

ADF4110/ADF4111/ADF4112/ADF4113 TYPICAL PERFORMANCE CHARACTERISTICS FREQ PARAM DATA KEYWORD –UNIT –TYPE –FORMAT GHz FREQ MAGS11 ANGS11 FREQ MAGS11 0.05 0.89207 –2.0571 1.05 0.9512 0.10 0.8886 –4.4427 1.10 0.93458 0.15 0.89022 –6.3212 1.15 0.94782 0.20 0.96323 –2.1393 1.20 0.96875 ...

Page 9

REFERENCE – 3V LEVEL = –4.2dBm I = 5mA CP –20 PFD FREQUENCY = 200kHz LOOP BANDWIDTH = 20kHz RES. BANDWIDTH = 1kHz –30 VIDEO BANDWIDTH = 1kHz –40 SWEEP = 2.5s AVERAGES = ...

Page 10

ADF4110/ADF4111/ADF4112/ADF4113 –40 –50 –60 RMS NOISE = 1.7° – 40dBc/Hz L –80 –90 –100 –110 –120 –130 –140 FREQUENCY OFFSET FROM 3100MHz CARRIER (Hz) Figure 17. ADF4113 Integrated Phase Noise (3100 MHz, ...

Page 11

TEMPERATURE (°C) Figure 23. ADF4113 Phase Noise vs. Temperature (836 MHz, 30 kHz, 3 kHz) –60 –70 –80 –90 –100 –40 – TEMPERATURE (°C) Figure ...

Page 12

ADF4110/ADF4111/ADF4112/ADF4113 CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 28. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed and SW1 and SW2 are opened. This ...

Page 13

PHASE FREQUENCY DETECTOR (PFD) AND CHARGE PUMP The PFD takes inputs from the R counter and N counter ( and produces an output proportional to the phase and frequency difference between them. Figure ...

Page 14

ADF4110/ADF4111/ADF4112/ADF4113 Table 6. ADF4110 Family Latch Summary TEST BACKLASH SYNC DLY MODE BITS WIDTH DB23 DB22 DB21 DB20 DB19 DB18 DB17 X DLY SYNC LDP T2 T1 ABP2 ABP1 X = DON'T CARE RESERVED DB23 DB22 DB21 DB20 DB19 DB18 ...

Page 15

Table 7. Reference Counter Latch Map ANTI- TEST BACKLASH DLY SYNC MODE BITS WIDTH DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 X DLY SYNC LDP T2 T1 ABP2 ABP1 X = DON'T CARE ABP2 TEST ...

Page 16

ADF4110/ADF4111/ADF4112/ADF4113 Table 8. AB Counter Latch Map RESERVED DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 B13 B12 B11 B10 X = DON'T CARE B13 B12 ...

Page 17

Table 9. Function Latch Map CURRENT SETTING PRESCALER 2 VALUE DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 P2 P1 PD2 CPI6 CPI5 CPI4 CPI3 CPI6 CPI5 CPI3 CPI2 ...

Page 18

ADF4110/ADF4111/ADF4112/ADF4113 Table 10. Initialization Latch Map CURRENT PRESCALER SETTING VALUE 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 P2 P1 PD2 CPI6 CPI5 CPI4 CPI3 CPI6 CPI5 CPI3 CPI2 ...

Page 19

FUNCTION LATCH The on-chip function latch is programmed with C2, C1 set to 1. Table 9 shows the input data format for programming the function latch. Counter Reset DB2 (F1) is the counter reset bit. When DB2 is 1, the ...

Page 20

ADF4110/ADF4111/ADF4112/ADF4113 Note that there is an enable feature on the timer counter enabled when Fastlock Mode 2 is chosen by setting the fastlock mode bit (DB10) in the function latch to 1. Charge Pump Currents CPI3, CPI2, and ...

Page 21

RESYNCHRONIZING THE PRESCALER OUTPUT Table 7 (the Reference Counter Latch Map) shows two bits, DB22 and DB21, which are labeled DLY and SYNC, respectively. These bits affect the operation of the prescaler. With SYNC = 1, the prescaler output is ...

Page 22

ADF4110/ADF4111/ADF4112/ADF4113 APPLICATIONS LOCAL OSCILLATOR FOR GSM BASE STATION TRANSMITTER Figure 33 shows the ADF4111/ADF4112/ADF4113 being used with a VCO to produce the LO for a GSM base station transmitter. The reference input signal is applied to the circuit at FREF ...

Page 23

FREF REF CLK DATA 2.7kΩ V-OUT DAC SPI COMPATIBLE SERIAL BUS USING A D/A CONVERTER TO DRIVE THE R A D/A converter can be used to drive the R ADF4110 family, thus increasing the ...

Page 24

ADF4110/ADF4111/ADF4112/ADF4113 V AV FREF 8 IN REF ADF4110 ADF4111 ADF4112 ADF4113 1000pF 1000pF REF FREF Ω ADF4113 CE CLK DATA POWER-DOWN CONTROL ...

Page 25

DIRECT CONVERSION MODULATOR In some applications, a direct conversion architecture can be used in base station transmitters. Figure 37 shows the combina- tion available from ADI to implement this solution. The circuit diagram shows the AD9761 being used with the ...

Page 26

ADF4110/ADF4111/ADF4112/ADF4113 INTERFACING The ADF4110 family has a simple SPI® compatible serial inter- face for writing to the device. SCLK, SDATA, and LE control the data transfer. When latch enable (LE) goes high, the 24 bits that have been clocked into ...

Page 27

OUTLINE DIMENSIONS PIN 1 INDICATOR 1.00 0.85 0.80 SEATING PLANE 0.15 0.05 0.60 4.0 MAX BSC SQ 0.60 MAX TOP 3.75 BSC SQ VIEW 0.75 0.55 0.35 0.80 MAX 12° MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.20 COPLANARITY 0.50 ...

Page 28

... ADF4112BRU-REEL7 –40°C to +85°C 1 ADF4112BRUZ –40°C to +85°C ADF4112BRUZ 1 -REEL –40°C to +85°C 1 ADF4112BRUZ -REEL7 –40°C to +85°C ADF4112BCP –40°C to +85°C ADF4112BCP-REEL –40°C to +85°C ADF4112BCP-REEL7 –40°C to +85°C ADF4113BRU –40°C to +85°C ADF4113BRU-REEL – ...

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