ADF4360-0BCPZ Analog Devices Inc, ADF4360-0BCPZ Datasheet - Page 4

• Manufacturer Part Number: ADF4360-0BCPZ
• Description: IC INTEGRATED SYNTH/VCO 24-LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Distribution, Integer N Synthesizer (RF)r

Specifications of ADF4360-0BCPZ

• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 2.725GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-LFCSP
• Frequency-max: 2.725GHz
• Pll Type: Frequency Synthesis
• Frequency: 2.725GHz
• Supply Current: 10mA
• Supply Voltage Range: 3V To 3.6V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 24
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADF4360-0EBZ1 - BOARD EVALUATION FOR ADF4360-0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADF4360-0
Parameter
NOISE CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
12
13
Operating temperature range is: –40°C to +85°C.
Guaranteed by design. Sample tested to ensure compliance.
I
T
These characteristics are guaranteed for VCO core power = 10 mA.
Jumping from 2.4 GHz to 2.725 GHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
Using 50 Ω resistors to V
The noise of the VCO is measured in open-loop conditions.
The synthesizer phase-noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value).
CP
The phase noise is measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REF
f
f
The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REF
the synthesizer; f
synthesizer; offset frequency = 1 kHz.
A
REFIN
REFIN
VCO Phase-Noise Performance
Synthesizer Phase-Noise Floor
In-Band Phase Noise
RMS Integrated Phase Error
Spurious Signals due to PFD Frequency
Level of Unlocked Signal with MTLD Enabled
= 25°C; AV
is internally modified to maintain constant loop gain over the frequency range.
= 10 MHz; f
= 10 MHz; f
DD
= DV
PFD
PFD
REFOUT
= 200 kHz; N = 2600; Loop B/W = 10 kHz.
= 1 MHz; N = 2600; Loop B/W = 25 kHz.
DD
= V
= 10 MHz @ 0 dBm.
VCO
10, 11
VCO
into a 50 Ω load. For tuned loads, see the Output Matching section.
5
= 3.3 V; P = 32.
12
9
8
11, 13
B Version
−111
−133
−140
−145
−172
−163
−147
−80
1.4
−75
−45
Rev. A | Page 4 of 24
Unit
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
Degrees typ
dBc typ
dBm typ
Conditions/Comments
@ 100 kHz offset from carrier.
@ 1 MHz offset from carrier.
@ 3 MHz offset from carrier.
@ 10 MHz offset from carrier.
@ 25 kHz PFD frequency.
@ 200 kHz PFD frequency.
@ 8 MHz PFD frequency.
@ 1 kHz offset from carrier.
100 Hz to 100 kHz.
IN
for the
IN
for