ADF4107BRUZ Analog Devices Inc, ADF4107BRUZ Datasheet - Page 9

• Manufacturer Part Number: ADF4107BRUZ
• Description: IC SYNTH FREQ PLL 7GHZ 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4107BRUZ

• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:1
• Differential - Input:output: Yes/No
• Frequency - Max: 7GHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 7GHz
• Pll Type: Frequency Synthesis
• Frequency: 7GHz
• Supply Current: 15mA
• Supply Voltage Range: 2.7V To 3.3V
• Digital Ic Case Style: TSSOP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FUNCTIONAL DESCRIPTION
REFERENCE INPUT STAGE
The reference input stage is shown in Figure 17. SW1 and SW2
are normally closed switches. SW3 is normally open. When
power-down is initiated, SW3 is closed and SW1 and SW2 are
opened. This ensures that there is no loading of the REF
on power-down.
RF INPUT STAGE
The RF input stage is shown in Figure 18. It is followed by a
2-stage limiting amplifier to generate the CML clock levels
needed for the prescaler.
PRESCALER (P/P + 1)
The dual-modulus prescaler (P/P + 1), along with the A and B
counters, enables the large division ratio, N, to be realized
(N = BP + A). The dual-modulus prescaler, operating at CML
levels, takes the clock from the RF input stage and divides it
down to a manageable frequency for the CMOS A and CMOS B
counters. The prescaler is programmable. It can be set in
software to 8/9, 16/17, 32/33, or 64/65. It is based on a
synchronous 4/5 core. A minimum divide ratio is possible for
fully contiguous output frequencies. This minimum is
determined by P, the prescaler value, and is given by: (P
RF
RF
REF
IN
IN
A
B
IN
NC
GENERATOR
POWER-DOWN
Figure 17. Reference Input Stage
SW1
CONTROL
BIAS
Figure 18. RF Input Stage
NO
NC
SW2
500Ω
SW3
100kΩ
1.6V
500Ω
BUFFER
AGND
AV
DD
TO R COUNTER
2
IN
− P).
pin
Rev. A | Page 9 of 20
A AND B COUNTERS
The A and B CMOS counters combine with the dual-modulus
prescaler to allow a wide ranging division ratio in the PLL
feedback counter. The counters are specified to work when the
prescaler output is 300 MHz or less. Thus, with an RF input
frequency of 4.0 GHz, a prescaler value of 16/17 is valid but a
value of 8/9 is not valid.
Pulse Swallow Function
The A and B counters, in conjunction with the dual-modulus
prescaler, make it possible to generate output frequencies that
are spaced only by the reference frequency divided by R. The
equation for the VCO frequency is as follows:
where:
f
oscillator (VCO).
P is the preset modulus of dual-modulus prescaler (8/9, 16/17).
B is the preset divide ratio of binary 13-bit counter (3 to 8191).
A is the preset divide ratio of binary 6-bit swallow counter (0 to 63).
f
R COUNTER
The 14-bit R counter allows the input reference frequency to be
divided down to produce the reference clock to the phase
frequency detector (PFD). Division ratios from 1 to 16,383 are
allowed.
PHASE FREQUENCY DETECTOR AND CHARGE PUMP
The phase frequency detector (PFD) takes inputs from the R
counter and N counter (N = BP + A) and produces an output
proportional to the phase and frequency difference between
them. Figure 20 is a simplified schematic. The PFD includes a
programmable delay element that controls the width of the
antibacklash pulse. This pulse ensures that there is no dead zone
in the PFD transfer function and minimizes phase noise and
reference spurs. Two bits in the reference counter latch, ABP2
and ABP1, control the width of the pulse. Use of the minimum
antibacklash pulse width is not recommended. See Figure 23.
VCO
INPUT STAGE
REFIN
is the output frequency of external voltage controlled
FROM RF
f
is the external reference frequency oscillator.
VCO
=
[
(
P
MODULUS
N DIVIDER
CONTROL
N = BP + A
×
B
PRESCALER
)
P/P + 1
Figure 19. A and B Counters
+
A
]
×
f
REFIN
R
LOAD
LOAD
COUNTER
COUNTER
13-BIT B
6-BIT A
ADF4107
TO PFD