ICS8516FYLF IDT, Integrated Device Technology Inc, ICS8516FYLF Datasheet - Page 10

• Manufacturer Part Number: ICS8516FYLF
• Description: IC CLK DISTR 1:16 LVDS 48-LQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS8516FYLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:16
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVDS
• Frequency - Max: 700MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Frequency-max: 700MHz
• Number Of Outputs: 32
• Operating Supply Voltage (max): 3.465V
• Operating Temp Range: 0C to 70C
• Propagation Delay Time: 5ns
• Operating Supply Voltage (min): 3.135V
• Mounting: Surface Mount
• Pin Count: 48
• Operating Supply Voltage (typ): 3.3V
• Package Type: TQFP
• Duty Cycle: 55%
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1154; 8516FYLF

IDT™ / ICS™ LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
ICS8516
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP
8516FY
F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. Both V
V
face examples for the HiPerClockS CLK/nCLK input driven by
the most common driver types. The input interfaces suggested
F
F
IGURE
PP
IGURE
IGURE
IFFERENTIAL
3.3V
and V
R5,R6 locate near the driver pin.
3.3V
LVPECL
2C. H
2A. H
2E. H
1.8V
CMR
LVPECL
R5
100 - 200
input requirements. Figures 2A to 2E show inter-
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
ICS H
3.3V LVPECL D
I
I
I
P
P
Integrated
Circuit
Systems, Inc.
P
C
ER
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
R6
100 - 200
C
C
Zo = 50 Ohm
Zo = 50 Ohm
C
I
P
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
ER
C
I
NPUT
S CLK/nCLK I
S CLK/nCLK I
S CLK/
LOCK
RIVER
S LVHSTL D
RIVER WITH
R1
50
3.3V
R3
125
C1
C2
I
NTERFACE
R1
84
N
SWING
CLK I
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
and V
NPUT
NPUT
NPUT
CLK
nCLK
R4
125
www.icst.com/products/hiperclocks.html
R2
84
AC C
CLK
nCLK
3.3V
OH
3.3V
RIVER
HiPerClockS
Input
D
D
D
must meet the
HiPerClockS
Input
RIVEN BY
RIVEN BY
RIVEN BY
OUPLE
CLK
nCLK
3.3V
HiPerClockS
Input
D
IFFERENTIAL
10
10
here are examples only. Please consult with the vendor of the
driver component to confirm the driver termination requirements.
For example in Figure 2A, the input termination applies for ICS
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
2B. H
2D. H
LVDS_Driv er
-
LVPECL
TO
-LVDS C
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S CLK/nCLK I
S CLK/nCLK I
LOCK
RIVER
R1
50
RIVER
R3
50
L
OW
D
R2
50
R1
100
ISTRIBUTION
S
CLK
nCLK
3.3V
KEW
NPUT
NPUT
REV. B FEBRUARY 21, 2006
HiPerClockS
Input
D
D
CLK
nCLK
, 1-
RIVEN BY
RIVEN BY
3.3V
Receiv er
TO
C
-16
HIP
ICS8516
TSD