ICS85211BMI-03LN IDT, Integrated Device Technology Inc, ICS85211BMI-03LN Datasheet - Page 10

• Manufacturer Part Number: ICS85211BMI-03LN
• Description: IC CLK FANOUT BUFFER 1:2 8SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS85211BMI-03LN

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVDS, LVHSTL, LVPECL, SSTL
• Output: LVHSTL
• Frequency - Max: 700MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC
• Frequency-max: 700MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1959-5; 85211BMI-03LN; ICS85211BMI-03LN

ICS85211BI-03 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS85211BI-03.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS85211BI-03 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
ICS85211BMI-03 REVISION C MARCH 12, 2010
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 77.76mW = 155.52mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.346W * 103.3°C/W = 120.7°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.3V, with all outputs switching) =190.6mW + 155.52mW = 346.12mW
MAX
MAX
= V
= 77.76mW/Loaded Output pair
DD_MAX
θ
JA
* I
for 8 Lead SOIC, Forced Convection
DD_MAX
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 55mA = 190.6mW
* Pd_total + T
θ
JA
A
153.3°C/W
112.7°C/W
vs. Air Flow
0
10
LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
128.5°C/W
103.3°C/W
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
115.5°C/W
97.1°C/W
500