ICS85211BMI-03LN IDT, Integrated Device Technology Inc, ICS85211BMI-03LN Datasheet

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ICS85211BMI-03LN

Manufacturer Part Number
ICS85211BMI-03LN
Description
IC CLK FANOUT BUFFER 1:2 8SOIC
Manufacturer
IDT, Integrated Device Technology Inc
Series
HiPerClockS™r
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of ICS85211BMI-03LN

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVHSTL
Frequency - Max
700MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC
Frequency-max
700MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1959-5
85211BMI-03LN
ICS85211BMI-03LN

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Part Number
Manufacturer
Quantity
Price
Part Number:
ICS85211BMI-03LN
Manufacturer:
IDT
Quantity:
123
Block Diagram
General Description
part-to-part skew characteristics make the ICS85211BI-03 ideal for
those clock distribution applications demanding well defined
performance and repeatability.
nCLK
ICS85211BMI-03 REVISION C MARCH 12, 2010
HiPerClockS™
CLK
ICS
Pullup
Pulldown
The ICS85211BI-03 is a low skew, high performance
1-to-2 Differential-to-LVHSTL Fanout Buffer. The CLK,
nCLK pair can accept most standard differential input
levels.The ICS85211BI-03 is characterized to operate
from a 3.3V power supply. Guaranteed output and
Low Skew, 1-to-2, Differential-to-LVHSTL
Fanout Buffer
Q0
nQ0
Q1
nQ1
1
Features
Two differential LVHSTL compatible outputs
One differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential input levels:
LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 700MHz
Translates any single ended input signal to LVHSTL levels with
resistor bias on nCLK input
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.3ns (maximum)
Output duty cycle: 49% – 51% up to 266.6MHz
V
3.3V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
OH
= 1.15V (maximum)
3.90mm x 4.903mm x 1.37mm package body
Pin Assignment
ICS85211BI-03
nQ0
nQ1
Q0
Q1
8-Lead SOIC
M Package
Top View
1
2
3
4
©2010 Integrated Device Technology, Inc.
ICS85211BI-03
8
7
6
5
V
CLK
nCLK
GND
DD
DATA SHEET

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ICS85211BMI-03LN Summary of contents

Page 1

... Block Diagram Q0 nQ0 Pullup CLK Pulldown nCLK Q1 nQ1 ICS85211BMI-03 REVISION C MARCH 12, 2010 Features • Two differential LVHSTL compatible outputs • One differential CLK, nCLK input pair • CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL • ...

Page 2

... Biased; NOTE 1 0 Biased; NOTE 1 1 NOTE 1: Please refer to the Application Information section, ""Wiring the Differential Input to Accept Single Ended Levels"". ICS85211BMI-03 REVISION C MARCH 12, 2010 Type Description Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. ...

Page 3

... PP NOTE 1 Common Mode Input Voltage; V CMR NOTE 1, 2 NOTE 1: V should not be less than -0.3V. IL NOTE 2: Common mode voltage is defined as V ICS85211BMI-03 REVISION C MARCH 12, 2010 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER Rating 4.6V -0. 0.5V DD 50mA 100mA -65°C to 150°C 112.7°C/W (0 lfpm) = 3.3V± ...

Page 4

... NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65. ICS85211BMI-03 REVISION C MARCH 12, 2010 = 3.3V±5 -40°C to 85°C ...

Page 5

... LVHSTL GND 0V Output Load AC Test Circuit Par t 1 nQx Qx Par t 2 nQy Qy tsk(pp) Part-to-Part Skew nQ[0:1] 80% 20% Q[0: Output Rise/Fall Time ICS85211BMI-03 REVISION C MARCH 12, 2010 V DD SCOPE Qx nCLK CLK nQx GND Differential Input Level nQx Qx nQy Qy Output Skew nCLK 80% CLK nQ[0:1] ...

Page 6

... ICS85211BI-03 Data Sheet Parameter Measurement Information, continued nQ[0:1] Q[0: PERIOD t PW odc = t PERIOD Output Duty Cycle/Pulse Width/Period ICS85211BMI-03 REVISION C MARCH 12, 2010 x 100% 6 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER ©2010 Integrated Device Technology, Inc. ...

Page 7

... This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission Figure 1. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels ICS85211BMI-03 REVISION C MARCH 12, 2010 line impedance. For most 50Ω applications, R3 and R4 can be 100Ω ...

Page 8

... R1 50 *Optional – R3 and R4 can be 0Ω Figure 2E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS85211BMI-03 REVISION C MARCH 12, 2010 Please consult with the vendor of the driver component to confirm the and V must meet the V driver termination requirements. For example, in Figure 2A, the input ...

Page 9

... Figure 3 shows a schematic example of ICS85211BI-03. In this example, the input is driven by an IDT HiPerClockS LVHSTL driver. 1. Ohm Ohm LVHSTL R6 ICS 50 HiPerClockS LVHSTL Driv er Figure 3. ICS85211BI-03 LVHSTL Buffer Schematic Example ICS85211BMI-03 REVISION C MARCH 12, 2010 The decoupling capacitors should be physically located near the power pin GND nQ1 6 3 nCLK Q1 ...

Page 10

... Linear Feet per Minute Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. ICS85211BMI-03 REVISION C MARCH 12, 2010 = 3. 3.465V, which gives worst case results ...

Page 11

... OL_MAX L DD_MAX Ω Pd_H = (1.15V/ (3.465V – 1.15V) = 53.24mW Ω Pd_L = (0.4V/ (3.465V – 0.4V) = 24.52mW Total Power Dissipation per output pair = Pd_H + Pd_L = 77.76mW ICS85211BMI-03 REVISION C MARCH 12, 2010 V OUT RL 50Ω ) OH_MAX ) OL_MAX 11 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER ...

Page 12

... NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. Transistor Count The transistor count for ICS85211BI-03 is: 472 Package Outline and Package Dimensions Package Outline - M Suffix for 8 Lead SOIC ICS85211BMI-03 REVISION C MARCH 12, 2010 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER θ by Velocity JA ...

Page 13

... Any other applications, such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS85211BMI-03 REVISION C MARCH 12, 2010 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER Package ...

Page 14

... Ordering Information Table - deleted ICS prefix from the Part/Order Numbers. 13 Converted datasheet format Updated “Wiring the Differential to Accept Single Ended Levels”. ICS85211BMI-03 REVISION C MARCH 12, 2010 LOW SKEW, 1-TO-2, DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER max. from 50mA to 55mA. DD limit from 50mA to 55mA to reflect Table 4A nCLK from -150uA to -5uA min ...

Page 15

ICS85211BI-03 Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

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