ICS952906AFLF IDT, Integrated Device Technology Inc, ICS952906AFLF Datasheet - Page 2

• Manufacturer Part Number: ICS952906AFLF
• Description: IC TIMING CTRL HUB P4 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS952906AFLF

• Input: Crystal
• Output: Clock
• Frequency - Max: 460MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Frequency-max: 460MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 952906AFLF

Pin Description
1236A—08/06/07
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
PIN # PIN NAME
*FS1/REF0
**FS0/REF1
VDDREF
X1
X2
GND
**FS2/PCICLK_F0
**FS4/PCICLK_F1
PCICLK_F2
VDDPCI
GND
**MODE/PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
GND
PCICLK5
PCICLK6
**FS3/48MHz
**Sel24_48#/24_48MHz
GND
VDD48
3V66_2
3V66_1
VDD3V66
GND
3V66_0
Reset#
SCLK
SDATA
VttPWR_GD/PD#
VDD2.5
25Mhz_1
25Mhz_0
GND
CPUCLKC0
CPUCLKT0
VDDCPU
CPUCLKC1
CPUCLKT1
GND
CPUCLKC_ITP/(CPU_STOP#) I/O
CPUCLKT_ITP/(PCI_STOP#)
IREF
GND
VDDA
Integrated
Circuit
Systems, Inc.
PIN TYPE DESCRIPTION
I/O
I/O
PWR
IN
OUT
PWR
I/O
I/O
OUT
PWR
PWR
I/O
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
I/O
I/O
PWR
PWR
OUT
OUT
PWR
PWR
OUT
OUT
IN
I/O
IN
PWR
OUT
OUT
PWR
OUT
OUT
PWR
OUT
OUT
PWR
I/O
OUT
PWR
PWR
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Ground pin.
Function select latch input pin, 0=Desktop Mode (pin 44/45 are outputs), 1=Mobile Mode (pin44/45 are STOP
inputs) / PCI clock output.
Ground pin.
Ground pin.
Ground pin.
Real time system reset signal for frequency gear ratio change or watchdog timer timeout. This signal is
active low.
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs are valid and are ready
to be sampled. This is an active high input. / Asynchronous active low input pin used to power down the
device into a low power state.
Ground pin.
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias.
Supply for CPU clocks, 3.3V nominal
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias.
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias.
Ground pin.
Complementary clock of differential pair CPU outputs. These are current mode outputs. External resistors
are required for voltage bias. / Stops all CPUCLK besides the free running clocks
True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required
for voltage bias. / Stops all PCICLK besides the free running clocks
This pin establishes the reference current for the differential current-mode output pairs. This pin requires a
fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard
value.
Ground pin.
Frequency select latch input pin / 14.318 MHz reference clock.
Frequency select latch input pin / 14.318 MHz reference clock.
Frequency select latch input pin / 3.3V PCI free running clock output.
Frequency select latch input pin / 3.3V PCI free running clock output.
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
PCI clock output.
PCI clock output.
Frequency select latch input pin / Fixed 48MHz clock output. 3.3V
Latched select input for 24/48MHz output / 24/48MHz clock output. 1=24MHz, 0 = 48MHz.
Power pin for the 48MHz output.3.3V
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Power pin for the 3.3V 66MHz clocks.
3.3V 66.66MHz clock output
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 3.3V tolerant.
Power supply, nominal 2.5V
25MHz clock output, 2.5V
25MHz clock output, 2.5V
3.3V power for the PLL core.
2
ICS952906A