ICS9FG1200DF-1LF IDT, Integrated Device Technology Inc, ICS9FG1200DF-1LF Datasheet - Page 9

• Manufacturer Part Number: ICS9FG1200DF-1LF
• Description: IC FREQUENCY GENERATOR 56-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS9FG1200DF-1LF

• Input: Clock
• Output: Differential
• Frequency - Max: 400MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-SSOP
• Frequency-max: 400MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 9FG1200DF-1LF

IDT
T
NOTES on Skew and Differential Jitter Parameters:
1. Measured into fixed 2 pF load cap. Input to output skew is measured at the first output edge following the corresponding input.
2. Measured from differential cross-point to differential cross-point
3. All Bypass Mode Input-to-Output specs refer to the timing between an input edge and the specific output edge created by it.
4. This parameter is deterministic for a given device
5. Measured with scope averaging on to find mean value.
6. Long-term variation from nominal of input-to-output skew over temperature and voltage for a single device.
7. This parameter is measured at the outputs of two separate 9FG1200D-1 devices driven by a single CK410B+. The 9FG1200D-1 must be set to high bandwidth. Differential
phase jitter is the accumulation of the phase jitter not shared by the outputs (eg. not including the affects of spread spectrum). Target ranges of consideration are agents with
BW of 1-22MHz and 11-33MHz.
8. t is the period of the input clock
9. Differential spread spectrum tracking error is the difference in spread spectrum tracking between two 9FG1200D-1 devices This parameter is measured at the outputs of two
separate 9FG1200D-1 devices driven by a single CK410B+ in Spread Spectrum mode. The 9FG1200D-1 must set to high bandwidth. The spread spectrum characterisitics are
: maximum of 0.5%, 30 to 33KHz modulation frequency, linear profile.
10. This parameter is an absolute value. It is not a double-sided figure.
11. Measured as maximum pass band gain. At frequencies within the loop BW, highest point of magnification is called PLL jitter peaking.
12. Guaranteed by design and characterization, not 100% tested in production.
13. Measured at 3 db down or half power point.
Electrical Characteristics - Skew and Differential Jitter Parameters
PLL Jitter Peaking
PLL Jitter Peaking
CLK_IN, DIF [x:0]
CLK_IN, DIF [x:0]
A
CLK_IN, DIF[x:0]
CLK_IN, DIF[x:0]
ICS9FG1200D-1
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
PLL Bandwidth
PLL Bandwidth
®
= 0 - 70°C; Supply Voltage V
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
DIF[11:10]
DIF[11:0]
DIF[11:0]
DIF[11:0]
DIF[9:0]
Group
Parameter
t
t
t
t
SSTERROR
t
SKEW_G10
SKEW_A12
j
j
t
SKEW_G2
pll
SPO_PLL
peak-hibw
peak-lobw
pll
t
PD_BYP
t
SPO_PLL
PD_BYP
t
JPH
LOBW
HIBW
DD
= 3.3 V +/-5%
Differential Spread Spectrum Tracking Error (peak to peak)
Output-to-Output Skew across all 12 outputs (Common to
(over specified voltage / temperature operating ranges)
(over specified voltage / temperature operating ranges)
Bypass and PLL mode - all outputs at same gear)
Input-to-Output Skew in Bypass mode (1:1 only),
Input-to-Output Skew Variation in Bypass mode
Input-to-Output Skew in PLL mode (1:1 only),
Input-to-Output Skew Variation in PLL mode
Differential Phase Jitter (RMS Value)
(Common to Bypass and PLL mode)
(Common to Bypass and PLL mode)
Output-to-Output Skew Group of 10
Output-to-Output Skew Group of 2
nominal value @ 25°C, 3.3V
nominal value @ 25°C, 3.3V
(HIGH_BW# = 0)
(HIGH_BW# = 1)
(HIGH_BW# = 0)
(HIGH_BW# = 1)
Description
9
-500
Min
2.5
0.7
0
0
2
2.15
Typ
140
270
470
3.1
1.2
3.6
1.2
10
40
80
40
5
|350|
|500|
Max
500
100
4.5
2.5
1.4
25
50
10
80
2
4
Units
MHz
MHz
1138C 02/08/10
dB
dB
ps
ns
ps
ps
ps
ps
ps
ps
ps
1,2,4,5,8,
1,2,4,5,6,
1,2,3,4,5,
1,2,3,12
1,4,7,12
1,4,9,12
1,2,3,5,
6,10,12
Notes
1,2,12
1,2,12
10,12
11,12
11,12
12,13
12,13
12
12