ICS9FG1200DF-1LF IDT, Integrated Device Technology Inc, ICS9FG1200DF-1LF Datasheet - Page 15

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ICS9FG1200DF-1LF

Manufacturer Part Number
ICS9FG1200DF-1LF
Description
IC FREQUENCY GENERATOR 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS9FG1200DF-1LF

Input
Clock
Output
Differential
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9FG1200DF-1LF
IDT
SMBusTable: 1:1 PLL Frequency Selection
SMBusTable: Reserved Register
SMBus Table: M/N Programming Enable
SMBus Table: Gear PLL Frequency Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ICS9FG1200D-1
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
®
Byte 10
Byte 11
Byte 8
Byte 9
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
Gear PLL M Div5
Gear PLL M Div4
Gear PLL M Div3
Gear PLL M Div2
Gear PLL M Div1
Gear PLL M Div0
M/N_EN
Name
Name
Name
Name
Frequency Select C
Frequency Select B
FS_A_410
M Divider Programming
Gear PLL and 1:1 PLL
Control Function
Control Function
Control Function
M/N Programming
Control Function
Enable
bits
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
15
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Contact IDT for 9FG1200-
1 M/N programming Table
See 9FG1200-1 1:1 PLL
Disable
Programming Table
0
0
0
0
Enable
1
1
1
1
Latch
PWD
PWD
PWD
PWD
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
x
1
0
0
0
0
0
0
0
0
0
1138C 02/08/10

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