ICS9DB108BGLF IDT, Integrated Device Technology Inc, ICS9DB108BGLF Datasheet - Page 2

IC BUFFER 8OUTPUT DIFF 48-TSSOP

ICS9DB108BGLF

Manufacturer Part Number
ICS9DB108BGLF
Description
IC BUFFER 8OUTPUT DIFF 48-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Bufferr
Series
-r
Datasheet

Specifications of ICS9DB108BGLF

Input
Clock
Output
Clock
Frequency - Max
220MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Frequency-max
220MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9DB108BGLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS9DB108BGLF
Manufacturer:
ICS
Quantity:
10
Part Number:
ICS9DB108BGLFT
Manufacturer:
SANYO
Quantity:
4 000
Pin Description
0723G—12/02/08
PIN #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
SRC_DIV#
VDD
GND
SRC_IN
SRC_IN#
OE_0
OE_3
DIF_0
DIF_0#
GND
VDD
DIF_1
DIF_1#
OE_1
OE_2
DIF_2
DIF_2#
GND
VDD
DIF_3
DIF_3#
BYPASS#/PLL
SCLK
SDATA
Integrated
Circuit
Systems, Inc.
PIN NAME
PIN TYPE
PWR
PWR
PWR
PWR
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
I/O
IN
IN
IN
IN
IN
IN
IN
IN
IN
Active low Input for determining SRC output frequency SRC or
SRC/2.
0 = SRC/2, 1= SRC
Power supply, nominal 3.3V
Ground pin.
0.7 V Differential SRC TRUE input
0.7 V Differential SRC COMPLEMENTARY input
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
0.7V differential true clock outputs
0.7V differential complement clock outputs
Ground pin.
Power supply, nominal 3.3V
0.7V differential true clock outputs
0.7V differential complement clock outputs
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
0.7V differential true clock outputs
0.7V differential complement clock outputs
Ground pin.
Power supply, nominal 3.3V
0.7V differential true clock outputs
0.7V differential complement clock outputs
Input to select Bypass(fan-out) or PLL (ZDB) mode
0 = Bypass mode, 1= PLL mode
Clock pin of SMBus circuitry, 5V tolerant.
Data pin for SMBus circuitry, 5V tolerant.
2
(Not recommended for new designs)
DESCRIPTION
ICS9DB108

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